uc-sdk
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Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx. More...
Go to the source code of this file.
Classes | |
struct | I2S_CFG_Type |
I2S configuration structure definition. More... | |
struct | I2S_DMAConf_Type |
I2S DMA configuration structure definition. More... | |
struct | I2S_MODEConf_Type |
I2S mode configuration structure definition. More... | |
Macros | |
#define | I2S_WORDWIDTH_8 ((uint32_t)(0)) |
#define | I2S_WORDWIDTH_16 ((uint32_t)(1)) |
#define | I2S_WORDWIDTH_32 ((uint32_t)(3)) |
#define | I2S_STEREO ((uint32_t)(0)) |
#define | I2S_MONO ((uint32_t)(1)) |
#define | I2S_MASTER_MODE ((uint8_t)(0)) |
#define | I2S_SLAVE_MODE ((uint8_t)(1)) |
#define | I2S_STOP_ENABLE ((uint8_t)(1)) |
#define | I2S_STOP_DISABLE ((uint8_t)(0)) |
#define | I2S_RESET_ENABLE ((uint8_t)(1)) |
#define | I2S_RESET_DISABLE ((uint8_t)(0)) |
#define | I2S_MUTE_ENABLE ((uint8_t)(1)) |
#define | I2S_MUTE_DISABLE ((uint8_t)(0)) |
#define | I2S_TX_MODE ((uint8_t)(0)) |
#define | I2S_RX_MODE ((uint8_t)(1)) |
#define | I2S_CLKSEL_FRDCLK ((uint8_t)(0)) |
#define | I2S_CLKSEL_MCLK ((uint8_t)(2)) |
#define | I2S_4PIN_ENABLE ((uint8_t)(1)) |
#define | I2S_4PIN_DISABLE ((uint8_t)(0)) |
#define | I2S_MCLK_ENABLE ((uint8_t)(1)) |
#define | I2S_MCLK_DISABLE ((uint8_t)(0)) |
#define | I2S_DMA_1 ((uint8_t)(0)) |
#define | I2S_DMA_2 ((uint8_t)(1)) |
#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ |
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ |
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ |
#define | I2S_DAO_MONO ((uint32_t)(1<<2)) |
#define | I2S_DAO_STOP ((uint32_t)(1<<3)) |
#define | I2S_DAO_RESET ((uint32_t)(1<<4)) |
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5)) |
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6)) |
#define | I2S_DAO_MUTE ((uint32_t)(1<<15)) |
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ |
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ |
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ |
#define | I2S_DAI_MONO ((uint32_t)(1<<2)) |
#define | I2S_DAI_STOP ((uint32_t)(1<<3)) |
#define | I2S_DAI_RESET ((uint32_t)(1<<4)) |
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5)) |
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6)) |
#define | I2S_DAI_MUTE ((uint32_t)(1<<15)) |
#define | I2S_STATE_IRQ ((uint32_t)(1)) |
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1)) |
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2)) |
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8)) |
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16)) |
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) |
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) |
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) |
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) |
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F)) |
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F)) |
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) |
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) |
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3)) |
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) |
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) |
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3)) |
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S)) |
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) |
#define | PARAM_I2S_WORDWIDTH(n) |
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO)) |
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE)) |
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE)) |
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE)) |
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE)) |
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE)) |
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK)) |
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE)) |
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE)) |
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2)) |
#define | PARAM_I2S_DMA_DEPTH(n) ((n>=0)||(n<=31)) |
#define | PARAM_I2S_IRQ_LEVEL(n) ((n>=0)||(n<=31)) |
#define | PARAM_I2S_HALFPERIOD(n) ((n>0)&&(n<512)) |
#define | PARAM_I2S_BITRATE(n) ((n>=0)&&(n<=63)) |
Functions | |
void | I2S_Init (LPC_I2S_TypeDef *I2Sx) |
void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx) |
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct) |
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) |
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode) |
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode) |
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) |
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx) |
void | I2S_Start (LPC_I2S_TypeDef *I2Sx) |
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode) |
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState) |
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) |
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level) |
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx.
Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.
Definition in file lpc17xx_i2s.h.