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Macros
I2S Private Macros
I2S

Macros

#define I2S_DAO_WORDWIDTH_8   ((uint32_t)(0)) /** 8 bit */
 
#define I2S_DAO_WORDWIDTH_16   ((uint32_t)(1)) /** 16 bit */
 
#define I2S_DAO_WORDWIDTH_32   ((uint32_t)(3)) /** 32 bit */
 
#define I2S_DAO_MONO   ((uint32_t)(1<<2))
 
#define I2S_DAO_STOP   ((uint32_t)(1<<3))
 
#define I2S_DAO_RESET   ((uint32_t)(1<<4))
 
#define I2S_DAO_SLAVE   ((uint32_t)(1<<5))
 
#define I2S_DAO_WS_HALFPERIOD(n)   ((uint32_t)(n<<6))
 
#define I2S_DAO_MUTE   ((uint32_t)(1<<15))
 
#define I2S_DAI_WORDWIDTH_8   ((uint32_t)(0)) /** 8 bit */
 
#define I2S_DAI_WORDWIDTH_16   ((uint32_t)(1)) /** 16 bit */
 
#define I2S_DAI_WORDWIDTH_32   ((uint32_t)(3)) /** 32 bit */
 
#define I2S_DAI_MONO   ((uint32_t)(1<<2))
 
#define I2S_DAI_STOP   ((uint32_t)(1<<3))
 
#define I2S_DAI_RESET   ((uint32_t)(1<<4))
 
#define I2S_DAI_SLAVE   ((uint32_t)(1<<5))
 
#define I2S_DAI_WS_HALFPERIOD(n)   ((uint32_t)((n&0x1FF)<<6))
 
#define I2S_DAI_MUTE   ((uint32_t)(1<<15))
 
#define I2S_STATE_IRQ   ((uint32_t)(1))
 
#define I2S_STATE_DMA1   ((uint32_t)(1<<1))
 
#define I2S_STATE_DMA2   ((uint32_t)(1<<2))
 
#define I2S_STATE_RX_LEVEL(n)   ((uint32_t)((n&1F)<<8))
 
#define I2S_STATE_TX_LEVEL(n)   ((uint32_t)((n&1F)<<16))
 
#define I2S_DMA1_RX_ENABLE   ((uint32_t)(1))
 
#define I2S_DMA1_TX_ENABLE   ((uint32_t)(1<<1))
 
#define I2S_DMA1_RX_DEPTH(n)   ((uint32_t)((n&0x1F)<<8))
 
#define I2S_DMA1_TX_DEPTH(n)   ((uint32_t)((n&0x1F)<<16))
 
#define I2S_DMA2_RX_ENABLE   ((uint32_t)(1))
 
#define I2S_DMA2_TX_ENABLE   ((uint32_t)(1<<1))
 
#define I2S_DMA2_RX_DEPTH(n)   ((uint32_t)((n&0x1F)<<8))
 
#define I2S_DMA2_TX_DEPTH(n)   ((uint32_t)((n&0x1F)<<16))
 
#define I2S_IRQ_RX_ENABLE   ((uint32_t)(1))
 
#define I2S_IRQ_TX_ENABLE   ((uint32_t)(1<<1))
 
#define I2S_IRQ_RX_DEPTH(n)   ((uint32_t)((n&0x1F)<<8))
 
#define I2S_IRQ_TX_DEPTH(n)   ((uint32_t)((n&0x1F)<<16))
 
#define I2S_TXRATE_Y_DIVIDER(n)   ((uint32_t)(n&0xFF))
 
#define I2S_TXRATE_X_DIVIDER(n)   ((uint32_t)((n&0xFF)<<8))
 
#define I2S_RXRATE_Y_DIVIDER(n)   ((uint32_t)(n&0xFF))
 
#define I2S_RXRATE_X_DIVIDER(n)   ((uint32_t)((n&0xFF)<<8))
 
#define I2S_TXBITRATE(n)   ((uint32_t)(n&0x3F))
 
#define I2S_RXBITRATE(n)   ((uint32_t)(n&0x3F))
 
#define I2S_TXMODE_CLKSEL(n)   ((uint32_t)(n&0x03))
 
#define I2S_TXMODE_4PIN_ENABLE   ((uint32_t)(1<<2))
 
#define I2S_TXMODE_MCENA   ((uint32_t)(1<<3))
 
#define I2S_RXMODE_CLKSEL(n)   ((uint32_t)(n&0x03))
 
#define I2S_RXMODE_4PIN_ENABLE   ((uint32_t)(1<<2))
 
#define I2S_RXMODE_MCENA   ((uint32_t)(1<<3))
 
#define PARAM_I2Sx(n)   (((uint32_t *)n)==((uint32_t *)LPC_I2S))
 
#define PRAM_I2S_FREQ(freq)   ((freq>=16000)&&(freq <= 96000))
 
#define PARAM_I2S_WORDWIDTH(n)
 
#define PARAM_I2S_CHANNEL(n)   ((n==I2S_STEREO)||(n==I2S_MONO))
 
#define PARAM_I2S_WS_SEL(n)   ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
 
#define PARAM_I2S_STOP(n)   ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
 
#define PARAM_I2S_RESET(n)   ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
 
#define PARAM_I2S_MUTE(n)   ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
 
#define PARAM_I2S_TRX(n)   ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
 
#define PARAM_I2S_CLKSEL(n)   ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
 
#define PARAM_I2S_4PIN(n)   ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
 
#define PARAM_I2S_MCLK(n)   ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
 
#define PARAM_I2S_DMA(n)   ((n==I2S_DMA_1)||(n==I2S_DMA_2))
 
#define PARAM_I2S_DMA_DEPTH(n)   ((n>=0)||(n<=31))
 
#define PARAM_I2S_IRQ_LEVEL(n)   ((n>=0)||(n<=31))
 
#define PARAM_I2S_HALFPERIOD(n)   ((n>0)&&(n<512))
 
#define PARAM_I2S_BITRATE(n)   ((n>=0)&&(n<=63))
 

Detailed Description

Macro Definition Documentation

#define I2S_DAI_MONO   ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 120 of file lpc17xx_i2s.h.

#define I2S_DAI_MUTE   ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 130 of file lpc17xx_i2s.h.

#define I2S_DAI_RESET   ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 124 of file lpc17xx_i2s.h.

#define I2S_DAI_SLAVE   ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 126 of file lpc17xx_i2s.h.

#define I2S_DAI_STOP   ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 122 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_16   ((uint32_t)(1)) /** 16 bit */

Definition at line 117 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_32   ((uint32_t)(3)) /** 32 bit */

Definition at line 118 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_8   ((uint32_t)(0)) /** 8 bit */

Macro defines for DAI-Digital Audio Input registerI2S wordwide - the number of bytes in data

Definition at line 116 of file lpc17xx_i2s.h.

#define I2S_DAI_WS_HALFPERIOD (   n)    ((uint32_t)((n&0x1FF)<<6))

I2S word select half period minus one (9 bits)

Definition at line 128 of file lpc17xx_i2s.h.

#define I2S_DAO_MONO   ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 100 of file lpc17xx_i2s.h.

#define I2S_DAO_MUTE   ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 110 of file lpc17xx_i2s.h.

#define I2S_DAO_RESET   ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 104 of file lpc17xx_i2s.h.

#define I2S_DAO_SLAVE   ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 106 of file lpc17xx_i2s.h.

#define I2S_DAO_STOP   ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 102 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_16   ((uint32_t)(1)) /** 16 bit */

Definition at line 97 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_32   ((uint32_t)(3)) /** 32 bit */

Definition at line 98 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_8   ((uint32_t)(0)) /** 8 bit */

Macro defines for DAO-Digital Audio Output registerI2S wordwide - the number of bytes in data

Definition at line 96 of file lpc17xx_i2s.h.

#define I2S_DAO_WS_HALFPERIOD (   n)    ((uint32_t)(n<<6))

I2S word select half period minus one

Definition at line 108 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 154 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_ENABLE   ((uint32_t)(1))

Macro defines for DMA1 register (DMA1 Configuration register)I2S control DMA1 for I2S receive

Definition at line 150 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 156 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_ENABLE   ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 152 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 166 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_ENABLE   ((uint32_t)(1))

Macro defines for DMA2 register (DMA2 Configuration register)I2S control DMA2 for I2S receive

Definition at line 162 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 168 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_ENABLE   ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 164 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<8))

I2S set the FIFO level on which to create an irq request

Definition at line 178 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_ENABLE   ((uint32_t)(1))

Macro defines for IRQ register (Interrupt Request Control register)I2S control I2S receive interrupt

Definition at line 174 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_DEPTH (   n)    ((uint32_t)((n&0x1F)<<16))

I2S set the FIFO level on which to create an irq request

Definition at line 180 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_ENABLE   ((uint32_t)(1<<1))

I2S control I2S transmit interrupt

Definition at line 176 of file lpc17xx_i2s.h.

#define I2S_RXBITRATE (   n)    ((uint32_t)(n&0x3F))

Definition at line 198 of file lpc17xx_i2s.h.

#define I2S_RXMODE_4PIN_ENABLE   ((uint32_t)(1<<2))

I2S Receive control 4-pin mode

Definition at line 212 of file lpc17xx_i2s.h.

#define I2S_RXMODE_CLKSEL (   n)    ((uint32_t)(n&0x03))

I2S Receive select clock source

Definition at line 210 of file lpc17xx_i2s.h.

#define I2S_RXMODE_MCENA   ((uint32_t)(1<<3))

I2S Receive control the TX_MCLK output

Definition at line 214 of file lpc17xx_i2s.h.

#define I2S_RXRATE_X_DIVIDER (   n)    ((uint32_t)((n&0xFF)<<8))

I2S Receive MCLK rate denominator

Definition at line 192 of file lpc17xx_i2s.h.

#define I2S_RXRATE_Y_DIVIDER (   n)    ((uint32_t)(n&0xFF))

I2S Receive MCLK rate denominator

Definition at line 190 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA1   ((uint32_t)(1<<1))

I2S Status Receive or Transmit DMA1

Definition at line 138 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA2   ((uint32_t)(1<<2))

I2S Status Receive or Transmit DMA2

Definition at line 140 of file lpc17xx_i2s.h.

#define I2S_STATE_IRQ   ((uint32_t)(1))

Macro defines for STAT register (Status Feedback register)I2S Status Receive or Transmit Interrupt

Definition at line 136 of file lpc17xx_i2s.h.

#define I2S_STATE_RX_LEVEL (   n)    ((uint32_t)((n&1F)<<8))

I2S Status Current level of the Receive FIFO (5 bits)

Definition at line 142 of file lpc17xx_i2s.h.

#define I2S_STATE_TX_LEVEL (   n)    ((uint32_t)((n&1F)<<16))

I2S Status Current level of the Transmit FIFO (5 bits)

Definition at line 144 of file lpc17xx_i2s.h.

#define I2S_TXBITRATE (   n)    ((uint32_t)(n&0x3F))

Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register)

Definition at line 197 of file lpc17xx_i2s.h.

#define I2S_TXMODE_4PIN_ENABLE   ((uint32_t)(1<<2))

I2S Transmit control 4-pin mode

Definition at line 206 of file lpc17xx_i2s.h.

#define I2S_TXMODE_CLKSEL (   n)    ((uint32_t)(n&0x03))

Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register)I2S Transmit select clock source (2 bits)

Definition at line 204 of file lpc17xx_i2s.h.

#define I2S_TXMODE_MCENA   ((uint32_t)(1<<3))

I2S Transmit control the TX_MCLK output

Definition at line 208 of file lpc17xx_i2s.h.

#define I2S_TXRATE_X_DIVIDER (   n)    ((uint32_t)((n&0xFF)<<8))

I2S Transmit MCLK rate denominator

Definition at line 188 of file lpc17xx_i2s.h.

#define I2S_TXRATE_Y_DIVIDER (   n)    ((uint32_t)(n&0xFF))

Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register)I2S Transmit MCLK rate denominator

Definition at line 186 of file lpc17xx_i2s.h.

#define PARAM_I2S_4PIN (   n)    ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))

Definition at line 240 of file lpc17xx_i2s.h.

#define PARAM_I2S_BITRATE (   n)    ((n>=0)&&(n<=63))

Definition at line 252 of file lpc17xx_i2s.h.

#define PARAM_I2S_CHANNEL (   n)    ((n==I2S_STEREO)||(n==I2S_MONO))

Definition at line 226 of file lpc17xx_i2s.h.

#define PARAM_I2S_CLKSEL (   n)    ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))

Definition at line 238 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA (   n)    ((n==I2S_DMA_1)||(n==I2S_DMA_2))

Definition at line 244 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA_DEPTH (   n)    ((n>=0)||(n<=31))

Definition at line 246 of file lpc17xx_i2s.h.

#define PARAM_I2S_HALFPERIOD (   n)    ((n>0)&&(n<512))

Definition at line 250 of file lpc17xx_i2s.h.

#define PARAM_I2S_IRQ_LEVEL (   n)    ((n>=0)||(n<=31))

Definition at line 248 of file lpc17xx_i2s.h.

#define PARAM_I2S_MCLK (   n)    ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))

Definition at line 242 of file lpc17xx_i2s.h.

#define PARAM_I2S_MUTE (   n)    ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))

Definition at line 234 of file lpc17xx_i2s.h.

#define PARAM_I2S_RESET (   n)    ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))

Definition at line 232 of file lpc17xx_i2s.h.

#define PARAM_I2S_STOP (   n)    ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))

Definition at line 230 of file lpc17xx_i2s.h.

#define PARAM_I2S_TRX (   n)    ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))

Definition at line 236 of file lpc17xx_i2s.h.

#define PARAM_I2S_WORDWIDTH (   n)
Value:
((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
||(n==I2S_WORDWIDTH_32))

Definition at line 223 of file lpc17xx_i2s.h.

#define PARAM_I2S_WS_SEL (   n)    ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))

Definition at line 228 of file lpc17xx_i2s.h.

#define PARAM_I2Sx (   n)    (((uint32_t *)n)==((uint32_t *)LPC_I2S))

Macro to determine if it is valid I2S peripheral

Definition at line 219 of file lpc17xx_i2s.h.

#define PRAM_I2S_FREQ (   freq)    ((freq>=16000)&&(freq <= 96000))

Macro to check Data to send valid

Definition at line 221 of file lpc17xx_i2s.h.