LPC17xx_System

Modules
	LPC17xx System Defines
	LPC17xx System Public Variables
	LPC17xx System Public Functions

Classes
struct	LPC_SC_TypeDef
	System Control (SC) register structure definition. More...
struct	LPC_PINCON_TypeDef
	Pin Connect Block (PINCON) register structure definition. More...
struct	LPC_GPIO_TypeDef
	General Purpose Input/Output (GPIO) register structure definition. More...
struct	LPC_GPIOINT_TypeDef
	General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct	LPC_TIM_TypeDef
	Timer (TIM) register structure definition. More...
struct	LPC_PWM_TypeDef
	Pulse-Width Modulation (PWM) register structure definition. More...
struct	LPC_UART_TypeDef
	Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct	LPC_UART0_TypeDef
	Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
struct	LPC_UART1_TypeDef
	Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct	LPC_SPI_TypeDef
	Serial Peripheral Interface (SPI) register structure definition. More...
struct	LPC_SSP_TypeDef
	Synchronous Serial Communication (SSP) register structure definition. More...
struct	LPC_I2C_TypeDef
	Inter-Integrated Circuit (I2C) register structure definition. More...
struct	LPC_I2S_TypeDef
	Inter IC Sound (I2S) register structure definition. More...
struct	LPC_RIT_TypeDef
	Repetitive Interrupt Timer (RIT) register structure definition. More...
struct	LPC_RTC_TypeDef
	Real-Time Clock (RTC) register structure definition. More...
struct	LPC_WDT_TypeDef
	Watchdog Timer (WDT) register structure definition. More...
struct	LPC_ADC_TypeDef
	Analog-to-Digital Converter (ADC) register structure definition. More...
struct	LPC_DAC_TypeDef
	Digital-to-Analog Converter (DAC) register structure definition. More...
struct	LPC_MCPWM_TypeDef
	Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...
struct	LPC_QEI_TypeDef
	Quadrature Encoder Interface (QEI) register structure definition. More...
struct	LPC_CANAF_RAM_TypeDef
	Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct	LPC_CANAF_TypeDef
	Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct	LPC_CANCR_TypeDef
	Controller Area Network Central (CANCR) register structure definition. More...
struct	LPC_CAN_TypeDef
	Controller Area Network Controller (CAN) register structure definition. More...
struct	LPC_GPDMA_TypeDef
	General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct	LPC_GPDMACH_TypeDef
	General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct	LPC_USB_TypeDef
	Universal Serial Bus (USB) register structure definition. More...
struct	LPC_EMAC_TypeDef
	Ethernet Media Access Controller (EMAC) register structure definition. More...

Macros
#define	__MPU_PRESENT   1
#define	__NVIC_PRIO_BITS   5
#define	__Vendor_SysTickConfig   0
#define	LPC_FLASH_BASE   (0x00000000UL)
#define	LPC_RAM_BASE   (0x10000000UL)
#define	LPC_AHBRAM0_BASE   (0x2007C000UL)
#define	LPC_AHBRAM1_BASE   (0x20080000UL)
#define	LPC_GPIO_BASE   (0x2009C000UL)
#define	LPC_APB0_BASE   (0x40000000UL)
#define	LPC_APB1_BASE   (0x40080000UL)
#define	LPC_AHB_BASE   (0x50000000UL)
#define	LPC_CM3_BASE   (0xE0000000UL)
#define	LPC_WDT_BASE   (LPC_APB0_BASE + 0x00000)
#define	LPC_TIM0_BASE   (LPC_APB0_BASE + 0x04000)
#define	LPC_TIM1_BASE   (LPC_APB0_BASE + 0x08000)
#define	LPC_UART0_BASE   (LPC_APB0_BASE + 0x0C000)
#define	LPC_UART1_BASE   (LPC_APB0_BASE + 0x10000)
#define	LPC_PWM1_BASE   (LPC_APB0_BASE + 0x18000)
#define	LPC_I2C0_BASE   (LPC_APB0_BASE + 0x1C000)
#define	LPC_SPI_BASE   (LPC_APB0_BASE + 0x20000)
#define	LPC_RTC_BASE   (LPC_APB0_BASE + 0x24000)
#define	LPC_GPIOINT_BASE   (LPC_APB0_BASE + 0x28080)
#define	LPC_PINCON_BASE   (LPC_APB0_BASE + 0x2C000)
#define	LPC_SSP1_BASE   (LPC_APB0_BASE + 0x30000)
#define	LPC_ADC_BASE   (LPC_APB0_BASE + 0x34000)
#define	LPC_CANAF_RAM_BASE   (LPC_APB0_BASE + 0x38000)
#define	LPC_CANAF_BASE   (LPC_APB0_BASE + 0x3C000)
#define	LPC_CANCR_BASE   (LPC_APB0_BASE + 0x40000)
#define	LPC_CAN1_BASE   (LPC_APB0_BASE + 0x44000)
#define	LPC_CAN2_BASE   (LPC_APB0_BASE + 0x48000)
#define	LPC_I2C1_BASE   (LPC_APB0_BASE + 0x5C000)
#define	LPC_SSP0_BASE   (LPC_APB1_BASE + 0x08000)
#define	LPC_DAC_BASE   (LPC_APB1_BASE + 0x0C000)
#define	LPC_TIM2_BASE   (LPC_APB1_BASE + 0x10000)
#define	LPC_TIM3_BASE   (LPC_APB1_BASE + 0x14000)
#define	LPC_UART2_BASE   (LPC_APB1_BASE + 0x18000)
#define	LPC_UART3_BASE   (LPC_APB1_BASE + 0x1C000)
#define	LPC_I2C2_BASE   (LPC_APB1_BASE + 0x20000)
#define	LPC_I2S_BASE   (LPC_APB1_BASE + 0x28000)
#define	LPC_RIT_BASE   (LPC_APB1_BASE + 0x30000)
#define	LPC_MCPWM_BASE   (LPC_APB1_BASE + 0x38000)
#define	LPC_QEI_BASE   (LPC_APB1_BASE + 0x3C000)
#define	LPC_SC_BASE   (LPC_APB1_BASE + 0x7C000)
#define	LPC_EMAC_BASE   (LPC_AHB_BASE + 0x00000)
#define	LPC_GPDMA_BASE   (LPC_AHB_BASE + 0x04000)
#define	LPC_GPDMACH0_BASE   (LPC_AHB_BASE + 0x04100)
#define	LPC_GPDMACH1_BASE   (LPC_AHB_BASE + 0x04120)
#define	LPC_GPDMACH2_BASE   (LPC_AHB_BASE + 0x04140)
#define	LPC_GPDMACH3_BASE   (LPC_AHB_BASE + 0x04160)
#define	LPC_GPDMACH4_BASE   (LPC_AHB_BASE + 0x04180)
#define	LPC_GPDMACH5_BASE   (LPC_AHB_BASE + 0x041A0)
#define	LPC_GPDMACH6_BASE   (LPC_AHB_BASE + 0x041C0)
#define	LPC_GPDMACH7_BASE   (LPC_AHB_BASE + 0x041E0)
#define	LPC_USB_BASE   (LPC_AHB_BASE + 0x0C000)
#define	LPC_GPIO0_BASE   (LPC_GPIO_BASE + 0x00000)
#define	LPC_GPIO1_BASE   (LPC_GPIO_BASE + 0x00020)
#define	LPC_GPIO2_BASE   (LPC_GPIO_BASE + 0x00040)
#define	LPC_GPIO3_BASE   (LPC_GPIO_BASE + 0x00060)
#define	LPC_GPIO4_BASE   (LPC_GPIO_BASE + 0x00080)
#define	LPC_SC   ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define	LPC_GPIO0   ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define	LPC_GPIO1   ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define	LPC_GPIO2   ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define	LPC_GPIO3   ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define	LPC_GPIO4   ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define	LPC_WDT   ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define	LPC_TIM0   ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define	LPC_TIM1   ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define	LPC_TIM2   ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define	LPC_TIM3   ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define	LPC_RIT   ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define	LPC_UART0   ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define	LPC_UART1   ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define	LPC_UART2   ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define	LPC_UART3   ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define	LPC_PWM1   ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define	LPC_I2C0   ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define	LPC_I2C1   ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define	LPC_I2C2   ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define	LPC_I2S   ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
#define	LPC_SPI   ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define	LPC_RTC   ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define	LPC_GPIOINT   ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define	LPC_PINCON   ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
#define	LPC_SSP0   ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define	LPC_SSP1   ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define	LPC_ADC   ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define	LPC_DAC   ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define	LPC_CANAF_RAM   ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define	LPC_CANAF   ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define	LPC_CANCR   ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define	LPC_CAN1   ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define	LPC_CAN2   ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define	LPC_MCPWM   ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define	LPC_QEI   ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define	LPC_EMAC   ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
#define	LPC_GPDMA   ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
#define	DMAREQSEL   (*(__IO uint32_t *) ( 0x4000C1C4))
#define	LPC_GPDMACH0   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define	LPC_GPDMACH1   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define	LPC_GPDMACH2   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define	LPC_GPDMACH3   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define	LPC_GPDMACH4   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define	LPC_GPDMACH5   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define	LPC_GPDMACH6   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define	LPC_GPDMACH7   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
#define	LPC_USB   ((LPC_USB_TypeDef *) LPC_USB_BASE )

Typedefs
typedef enum IRQn	IRQn_Type
	IRQ interrupt source definition. More...

Enumerations
enum	IRQn {   NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,   SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,   WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,   TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,   UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,   I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,   PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,   EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,   USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,   ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,   PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34, NonMaskableInt_IRQn = -14,   MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5,   DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0,   PVD_IRQn = 1, TAMPER_IRQn = 2, RTC_IRQn = 3, FLASH_IRQn = 4,   RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8,   EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Channel1_IRQn = 11, DMA1_Channel2_IRQn = 12,   DMA1_Channel3_IRQn = 13, DMA1_Channel4_IRQn = 14, DMA1_Channel5_IRQn = 15, DMA1_Channel6_IRQn = 16,   DMA1_Channel7_IRQn = 17 }
	IRQ interrupt source definition. More...

Functions
void	SystemInit (void)
	Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable. More...
void	SystemCoreClockUpdate (void)
	Updates the SystemCoreClock with current core Clock retrieved from cpu registers. More...

Variables
uint32_t	SystemCoreClock

Detailed Description

Macro Definition Documentation

#define __MPU_PRESENT   1

MPU present or not

Definition at line 98 of file LPC17xx.h.

#define __NVIC_PRIO_BITS   5

Number of Bits used for Priority Levels

Definition at line 99 of file LPC17xx.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 100 of file LPC17xx.h.

#define DMAREQSEL   (*(__IO uint32_t *) ( 0x4000C1C4))

Definition at line 1064 of file LPC17xx.h.

#define LPC_ADC   ((LPC_ADC_TypeDef *) LPC_ADC_BASE )

Definition at line 1053 of file LPC17xx.h.

#define LPC_ADC_BASE   (LPC_APB0_BASE + 0x34000)

Definition at line 981 of file LPC17xx.h.

#define LPC_AHB_BASE   (0x50000000UL)

Definition at line 965 of file LPC17xx.h.

#define LPC_AHBRAM0_BASE   (0x2007C000UL)

Definition at line 959 of file LPC17xx.h.

#define LPC_AHBRAM1_BASE   (0x20080000UL)

Definition at line 960 of file LPC17xx.h.

#define LPC_APB0_BASE   (0x40000000UL)

Definition at line 963 of file LPC17xx.h.

#define LPC_APB1_BASE   (0x40080000UL)

Definition at line 964 of file LPC17xx.h.

#define LPC_CAN1   ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )

Definition at line 1058 of file LPC17xx.h.

#define LPC_CAN1_BASE   (LPC_APB0_BASE + 0x44000)

Definition at line 985 of file LPC17xx.h.

#define LPC_CAN2   ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )

Definition at line 1059 of file LPC17xx.h.

#define LPC_CAN2_BASE   (LPC_APB0_BASE + 0x48000)

Definition at line 986 of file LPC17xx.h.

#define LPC_CANAF   ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )

Definition at line 1056 of file LPC17xx.h.

#define LPC_CANAF_BASE   (LPC_APB0_BASE + 0x3C000)

Definition at line 983 of file LPC17xx.h.

#define LPC_CANAF_RAM   ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)

Definition at line 1055 of file LPC17xx.h.

#define LPC_CANAF_RAM_BASE   (LPC_APB0_BASE + 0x38000)

Definition at line 982 of file LPC17xx.h.

#define LPC_CANCR   ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )

Definition at line 1057 of file LPC17xx.h.

#define LPC_CANCR_BASE   (LPC_APB0_BASE + 0x40000)

Definition at line 984 of file LPC17xx.h.

#define LPC_CM3_BASE   (0xE0000000UL)

Definition at line 966 of file LPC17xx.h.

#define LPC_DAC   ((LPC_DAC_TypeDef *) LPC_DAC_BASE )

Definition at line 1054 of file LPC17xx.h.

#define LPC_DAC_BASE   (LPC_APB1_BASE + 0x0C000)

Definition at line 991 of file LPC17xx.h.

#define LPC_EMAC   ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )

Definition at line 1062 of file LPC17xx.h.

#define LPC_EMAC_BASE   (LPC_AHB_BASE + 0x00000)

Definition at line 1004 of file LPC17xx.h.

#define LPC_FLASH_BASE   (0x00000000UL)

Definition at line 953 of file LPC17xx.h.

#define LPC_GPDMA   ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )

Definition at line 1063 of file LPC17xx.h.

#define LPC_GPDMA_BASE   (LPC_AHB_BASE + 0x04000)

Definition at line 1005 of file LPC17xx.h.

#define LPC_GPDMACH0   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )

Definition at line 1065 of file LPC17xx.h.

#define LPC_GPDMACH0_BASE   (LPC_AHB_BASE + 0x04100)

Definition at line 1006 of file LPC17xx.h.

#define LPC_GPDMACH1   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )

Definition at line 1066 of file LPC17xx.h.

#define LPC_GPDMACH1_BASE   (LPC_AHB_BASE + 0x04120)

Definition at line 1007 of file LPC17xx.h.

#define LPC_GPDMACH2   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )

Definition at line 1067 of file LPC17xx.h.

#define LPC_GPDMACH2_BASE   (LPC_AHB_BASE + 0x04140)

Definition at line 1008 of file LPC17xx.h.

#define LPC_GPDMACH3   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )

Definition at line 1068 of file LPC17xx.h.

#define LPC_GPDMACH3_BASE   (LPC_AHB_BASE + 0x04160)

Definition at line 1009 of file LPC17xx.h.

#define LPC_GPDMACH4   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )

Definition at line 1069 of file LPC17xx.h.

#define LPC_GPDMACH4_BASE   (LPC_AHB_BASE + 0x04180)

Definition at line 1010 of file LPC17xx.h.

#define LPC_GPDMACH5   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )

Definition at line 1070 of file LPC17xx.h.

#define LPC_GPDMACH5_BASE   (LPC_AHB_BASE + 0x041A0)

Definition at line 1011 of file LPC17xx.h.

#define LPC_GPDMACH6   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )

Definition at line 1071 of file LPC17xx.h.

#define LPC_GPDMACH6_BASE   (LPC_AHB_BASE + 0x041C0)

Definition at line 1012 of file LPC17xx.h.

#define LPC_GPDMACH7   ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )

Definition at line 1072 of file LPC17xx.h.

#define LPC_GPDMACH7_BASE   (LPC_AHB_BASE + 0x041E0)

Definition at line 1013 of file LPC17xx.h.

#define LPC_GPIO0   ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

Definition at line 1027 of file LPC17xx.h.

#define LPC_GPIO0_BASE   (LPC_GPIO_BASE + 0x00000)

Definition at line 1017 of file LPC17xx.h.

#define LPC_GPIO1   ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

Definition at line 1028 of file LPC17xx.h.

#define LPC_GPIO1_BASE   (LPC_GPIO_BASE + 0x00020)

Definition at line 1018 of file LPC17xx.h.

#define LPC_GPIO2   ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

Definition at line 1029 of file LPC17xx.h.

#define LPC_GPIO2_BASE   (LPC_GPIO_BASE + 0x00040)

Definition at line 1019 of file LPC17xx.h.

#define LPC_GPIO3   ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

Definition at line 1030 of file LPC17xx.h.

#define LPC_GPIO3_BASE   (LPC_GPIO_BASE + 0x00060)

Definition at line 1020 of file LPC17xx.h.

#define LPC_GPIO4   ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )

Definition at line 1031 of file LPC17xx.h.

#define LPC_GPIO4_BASE   (LPC_GPIO_BASE + 0x00080)

Definition at line 1021 of file LPC17xx.h.

#define LPC_GPIO_BASE   (0x2009C000UL)

Definition at line 962 of file LPC17xx.h.

#define LPC_GPIOINT   ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )

Definition at line 1049 of file LPC17xx.h.

#define LPC_GPIOINT_BASE   (LPC_APB0_BASE + 0x28080)

Definition at line 978 of file LPC17xx.h.

#define LPC_I2C0   ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )

Definition at line 1043 of file LPC17xx.h.

#define LPC_I2C0_BASE   (LPC_APB0_BASE + 0x1C000)

Definition at line 975 of file LPC17xx.h.

#define LPC_I2C1   ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )

Definition at line 1044 of file LPC17xx.h.

#define LPC_I2C1_BASE   (LPC_APB0_BASE + 0x5C000)

Definition at line 987 of file LPC17xx.h.

#define LPC_I2C2   ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )

Definition at line 1045 of file LPC17xx.h.

#define LPC_I2C2_BASE   (LPC_APB1_BASE + 0x20000)

Definition at line 996 of file LPC17xx.h.

#define LPC_I2S   ((LPC_I2S_TypeDef *) LPC_I2S_BASE )

Definition at line 1046 of file LPC17xx.h.

#define LPC_I2S_BASE   (LPC_APB1_BASE + 0x28000)

Definition at line 997 of file LPC17xx.h.

#define LPC_MCPWM   ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )

Definition at line 1060 of file LPC17xx.h.

#define LPC_MCPWM_BASE   (LPC_APB1_BASE + 0x38000)

Definition at line 999 of file LPC17xx.h.

#define LPC_PINCON   ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )

Definition at line 1050 of file LPC17xx.h.

#define LPC_PINCON_BASE   (LPC_APB0_BASE + 0x2C000)

Definition at line 979 of file LPC17xx.h.

#define LPC_PWM1   ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )

Definition at line 1042 of file LPC17xx.h.

#define LPC_PWM1_BASE   (LPC_APB0_BASE + 0x18000)

Definition at line 974 of file LPC17xx.h.

#define LPC_QEI   ((LPC_QEI_TypeDef *) LPC_QEI_BASE )

Definition at line 1061 of file LPC17xx.h.

#define LPC_QEI_BASE   (LPC_APB1_BASE + 0x3C000)

Definition at line 1000 of file LPC17xx.h.

#define LPC_RAM_BASE   (0x10000000UL)

Definition at line 954 of file LPC17xx.h.

#define LPC_RIT   ((LPC_RIT_TypeDef *) LPC_RIT_BASE )

Definition at line 1037 of file LPC17xx.h.

#define LPC_RIT_BASE   (LPC_APB1_BASE + 0x30000)

Definition at line 998 of file LPC17xx.h.

#define LPC_RTC   ((LPC_RTC_TypeDef *) LPC_RTC_BASE )

Definition at line 1048 of file LPC17xx.h.

#define LPC_RTC_BASE   (LPC_APB0_BASE + 0x24000)

Definition at line 977 of file LPC17xx.h.

#define LPC_SC   ((LPC_SC_TypeDef *) LPC_SC_BASE )

Definition at line 1026 of file LPC17xx.h.

#define LPC_SC_BASE   (LPC_APB1_BASE + 0x7C000)

Definition at line 1001 of file LPC17xx.h.

#define LPC_SPI   ((LPC_SPI_TypeDef *) LPC_SPI_BASE )

Definition at line 1047 of file LPC17xx.h.

#define LPC_SPI_BASE   (LPC_APB0_BASE + 0x20000)

Definition at line 976 of file LPC17xx.h.

#define LPC_SSP0   ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

Definition at line 1051 of file LPC17xx.h.

#define LPC_SSP0_BASE   (LPC_APB1_BASE + 0x08000)

Definition at line 990 of file LPC17xx.h.

#define LPC_SSP1   ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

Definition at line 1052 of file LPC17xx.h.

#define LPC_SSP1_BASE   (LPC_APB0_BASE + 0x30000)

Definition at line 980 of file LPC17xx.h.

#define LPC_TIM0   ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )

Definition at line 1033 of file LPC17xx.h.

#define LPC_TIM0_BASE   (LPC_APB0_BASE + 0x04000)

Definition at line 970 of file LPC17xx.h.

#define LPC_TIM1   ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )

Definition at line 1034 of file LPC17xx.h.

#define LPC_TIM1_BASE   (LPC_APB0_BASE + 0x08000)

Definition at line 971 of file LPC17xx.h.

#define LPC_TIM2   ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )

Definition at line 1035 of file LPC17xx.h.

#define LPC_TIM2_BASE   (LPC_APB1_BASE + 0x10000)

Definition at line 992 of file LPC17xx.h.

#define LPC_TIM3   ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )

Definition at line 1036 of file LPC17xx.h.

#define LPC_TIM3_BASE   (LPC_APB1_BASE + 0x14000)

Definition at line 993 of file LPC17xx.h.

#define LPC_UART0   ((LPC_UART_TypeDef *) LPC_UART0_BASE )

Definition at line 1038 of file LPC17xx.h.

#define LPC_UART0_BASE   (LPC_APB0_BASE + 0x0C000)

Definition at line 972 of file LPC17xx.h.

#define LPC_UART1   ((LPC_UART1_TypeDef *) LPC_UART1_BASE )

Definition at line 1039 of file LPC17xx.h.

#define LPC_UART1_BASE   (LPC_APB0_BASE + 0x10000)

Definition at line 973 of file LPC17xx.h.

#define LPC_UART2   ((LPC_UART_TypeDef *) LPC_UART2_BASE )

Definition at line 1040 of file LPC17xx.h.

#define LPC_UART2_BASE   (LPC_APB1_BASE + 0x18000)

Definition at line 994 of file LPC17xx.h.

#define LPC_UART3   ((LPC_UART_TypeDef *) LPC_UART3_BASE )

Definition at line 1041 of file LPC17xx.h.

#define LPC_UART3_BASE   (LPC_APB1_BASE + 0x1C000)

Definition at line 995 of file LPC17xx.h.

#define LPC_USB   ((LPC_USB_TypeDef *) LPC_USB_BASE )

Definition at line 1073 of file LPC17xx.h.

#define LPC_USB_BASE   (LPC_AHB_BASE + 0x0C000)

Definition at line 1014 of file LPC17xx.h.

#define LPC_WDT   ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

Definition at line 1032 of file LPC17xx.h.

#define LPC_WDT_BASE   (LPC_APB0_BASE + 0x00000)

Definition at line 969 of file LPC17xx.h.

Typedef Documentation

typedef enum IRQn IRQn_Type

IRQ interrupt source definition.

Enumeration Type Documentation

enum IRQn

IRQ interrupt source definition.

Enumerator
NonMaskableInt_IRQn	2 Non Maskable Interrupt
MemoryManagement_IRQn	4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M3 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
TIMER0_IRQn	Timer0 Interrupt
TIMER1_IRQn	Timer1 Interrupt
TIMER2_IRQn	Timer2 Interrupt
TIMER3_IRQn	Timer3 Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART3_IRQn	UART3 Interrupt
PWM1_IRQn	PWM1 Interrupt
I2C0_IRQn	I2C0 Interrupt
I2C1_IRQn	I2C1 Interrupt
I2C2_IRQn	I2C2 Interrupt
SPI_IRQn	SPI Interrupt
SSP0_IRQn	SSP0 Interrupt
SSP1_IRQn	SSP1 Interrupt
PLL0_IRQn	PLL0 Lock (Main PLL) Interrupt
RTC_IRQn	Real Time Clock Interrupt
EINT0_IRQn	External Interrupt 0 Interrupt
EINT1_IRQn	External Interrupt 1 Interrupt
EINT2_IRQn	External Interrupt 2 Interrupt
EINT3_IRQn	External Interrupt 3 Interrupt
ADC_IRQn	A/D Converter Interrupt
BOD_IRQn	Brown-Out Detect Interrupt
USB_IRQn	USB Interrupt
CAN_IRQn	CAN Interrupt
DMA_IRQn	General Purpose DMA Interrupt
I2S_IRQn	I2S Interrupt
ENET_IRQn	Ethernet Interrupt
RIT_IRQn	Repetitive Interrupt Timer Interrupt
MCPWM_IRQn	Motor Control PWM Interrupt
QEI_IRQn	Quadrature Encoder Interface Interrupt
PLL1_IRQn	PLL1 Lock (USB PLL) Interrupt
USBActivity_IRQn	USB Activity Interrupt
CANActivity_IRQn	CAN Activity Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
MemoryManagement_IRQn	4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M3 System Tick Interrupt
WWDG_IRQn	Window WatchDog Interrupt
PVD_IRQn	PVD through EXTI Line detection Interrupt
TAMPER_IRQn	Tamper Interrupt
RTC_IRQn	RTC global Interrupt
FLASH_IRQn	FLASH global Interrupt
RCC_IRQn	RCC global Interrupt
EXTI0_IRQn	EXTI Line0 Interrupt
EXTI1_IRQn	EXTI Line1 Interrupt
EXTI2_IRQn	EXTI Line2 Interrupt
EXTI3_IRQn	EXTI Line3 Interrupt
EXTI4_IRQn	EXTI Line4 Interrupt
DMA1_Channel1_IRQn	DMA1 Channel 1 global Interrupt
DMA1_Channel2_IRQn	DMA1 Channel 2 global Interrupt
DMA1_Channel3_IRQn	DMA1 Channel 3 global Interrupt
DMA1_Channel4_IRQn	DMA1 Channel 4 global Interrupt
DMA1_Channel5_IRQn	DMA1 Channel 5 global Interrupt
DMA1_Channel6_IRQn	DMA1 Channel 6 global Interrupt
DMA1_Channel7_IRQn	DMA1 Channel 7 global Interrupt

Definition at line 40 of file LPC17xx.h.

Function Documentation

void SystemCoreClockUpdate

(

void

)

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Update SystemCoreClock variable

Parameters

none

Returns

none

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Note

None

Parameters

None

Return values

None

Definition at line 448 of file system_LPC17xx.c.

void SystemInit

(

void

)

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters

none

Returns

none

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters

none

Returns

none

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Note

This function should be used only after reset.

Parameters

None

Return values

None

Definition at line 499 of file system_LPC17xx.c.

Variable Documentation

uint32_t SystemCoreClock

System Clock Frequency (Core Clock)

Definition at line 432 of file system_LPC17xx.c.