uc-sdk
 All Classes Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros
SSP Private Macros
SSP

Macros

#define SSP_CR0_DSS(n)   ((uint32_t)((n-1)&0xF))
 
#define SSP_CR0_FRF_SPI   ((uint32_t)(0<<4))
 
#define SSP_CR0_FRF_TI   ((uint32_t)(1<<4))
 
#define SSP_CR0_FRF_MICROWIRE   ((uint32_t)(2<<4))
 
#define SSP_CR0_CPOL_HI   ((uint32_t)(1<<6))
 
#define SSP_CR0_CPHA_SECOND   ((uint32_t)(1<<7))
 
#define SSP_CR0_SCR(n)   ((uint32_t)((n&0xFF)<<8))
 
#define SSP_CR0_BITMASK   ((uint32_t)(0xFFFF))
 
#define SSP_CR1_LBM_EN   ((uint32_t)(1<<0))
 
#define SSP_CR1_SSP_EN   ((uint32_t)(1<<1))
 
#define SSP_CR1_SLAVE_EN   ((uint32_t)(1<<2))
 
#define SSP_CR1_SO_DISABLE   ((uint32_t)(1<<3))
 
#define SSP_CR1_BITMASK   ((uint32_t)(0x0F))
 
#define SSP_DR_BITMASK(n)   ((n)&0xFFFF)
 
#define SSP_SR_TFE   ((uint32_t)(1<<0))
 
#define SSP_SR_TNF   ((uint32_t)(1<<1))
 
#define SSP_SR_RNE   ((uint32_t)(1<<2))
 
#define SSP_SR_RFF   ((uint32_t)(1<<3))
 
#define SSP_SR_BSY   ((uint32_t)(1<<4))
 
#define SSP_SR_BITMASK   ((uint32_t)(0x1F))
 
#define SSP_CPSR_CPDVSR(n)   ((uint32_t)(n&0xFF))
 
#define SSP_CPSR_BITMASK   ((uint32_t)(0xFF))
 
#define SSP_IMSC_ROR   ((uint32_t)(1<<0))
 
#define SSP_IMSC_RT   ((uint32_t)(1<<1))
 
#define SSP_IMSC_RX   ((uint32_t)(1<<2))
 
#define SSP_IMSC_TX   ((uint32_t)(1<<3))
 
#define SSP_IMSC_BITMASK   ((uint32_t)(0x0F))
 
#define SSP_RIS_ROR   ((uint32_t)(1<<0))
 
#define SSP_RIS_RT   ((uint32_t)(1<<1))
 
#define SSP_RIS_RX   ((uint32_t)(1<<2))
 
#define SSP_RIS_TX   ((uint32_t)(1<<3))
 
#define SSP_RIS_BITMASK   ((uint32_t)(0x0F))
 
#define SSP_MIS_ROR   ((uint32_t)(1<<0))
 
#define SSP_MIS_RT   ((uint32_t)(1<<1))
 
#define SSP_MIS_RX   ((uint32_t)(1<<2))
 
#define SSP_MIS_TX   ((uint32_t)(1<<3))
 
#define SSP_MIS_BITMASK   ((uint32_t)(0x0F))
 
#define SSP_ICR_ROR   ((uint32_t)(1<<0))
 
#define SSP_ICR_RT   ((uint32_t)(1<<1))
 
#define SSP_ICR_BITMASK   ((uint32_t)(0x03))
 
#define SSP_DMA_RXDMA_EN   ((uint32_t)(1<<0))
 
#define SSP_DMA_TXDMA_EN   ((uint32_t)(1<<1))
 
#define SSP_DMA_BITMASK   ((uint32_t)(0x03))
 
#define PARAM_SSPx(n)
 
#define PARAM_SSP_CPHA(n)   ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
 
#define PARAM_SSP_CPOL(n)   ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
 
#define PARAM_SSP_MODE(n)   ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
 
#define PARAM_SSP_DATABIT(n)
 
#define PARAM_SSP_FRAME(n)
 
#define PARAM_SSP_STAT(n)
 
#define PARAM_SSP_INTCFG(n)
 
#define PARAM_SSP_INTSTAT(n)
 
#define PARAM_SSP_INTSTAT_RAW(n)
 
#define PARAM_SSP_INTCLR(n)   ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
 
#define PARAM_SSP_DMA(n)   ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))
 

Detailed Description

Macro Definition Documentation

#define PARAM_SSP_CPHA (   n)    ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))

Macro check clock phase control mode

Definition at line 311 of file lpc17xx_ssp.h.

#define PARAM_SSP_CPOL (   n)    ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))

Macro check clock polarity mode

Definition at line 314 of file lpc17xx_ssp.h.

#define PARAM_SSP_DATABIT (   n)
Value:
((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
|| (n==SSP_DATABIT_15))

Definition at line 320 of file lpc17xx_ssp.h.

#define PARAM_SSP_DMA (   n)    ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Definition at line 353 of file lpc17xx_ssp.h.

#define PARAM_SSP_FRAME (   n)
Value:
((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
|| (n==SSP_FRAME_MICROWIRE))

Definition at line 329 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCFG (   n)
Value:
((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))

Definition at line 338 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCLR (   n)    ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))

Definition at line 350 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT (   n)
Value:
((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))

Definition at line 342 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT_RAW (   n)
Value:
((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))

Definition at line 346 of file lpc17xx_ssp.h.

#define PARAM_SSP_MODE (   n)    ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))

Definition at line 317 of file lpc17xx_ssp.h.

#define PARAM_SSP_STAT (   n)
Value:
((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
|| (n==SSP_STAT_BUSY))

Definition at line 333 of file lpc17xx_ssp.h.

#define PARAM_SSPx (   n)
Value:
((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))

Macro to determine if it is valid SSP port number

Definition at line 307 of file lpc17xx_ssp.h.

#define SSP_CPSR_BITMASK   ((uint32_t)(0xFF))

SSP CPSR bit mask

Definition at line 238 of file lpc17xx_ssp.h.

#define SSP_CPSR_CPDVSR (   n)    ((uint32_t)(n&0xFF))

Macro defines for CPSR registerSSP clock prescaler

Definition at line 236 of file lpc17xx_ssp.h.

#define SSP_CR0_BITMASK   ((uint32_t)(0xFFFF))

SSP CR0 bit mask

Definition at line 193 of file lpc17xx_ssp.h.

#define SSP_CR0_CPHA_SECOND   ((uint32_t)(1<<7))

SPI clock out phase bit (used in SPI mode only), (1) = captures data on the second clock transition of the frame, (0) = first

Definition at line 188 of file lpc17xx_ssp.h.

#define SSP_CR0_CPOL_HI   ((uint32_t)(1<<6))

SPI clock polarity bit (used in SPI mode only), (1) = maintains the bus clock high between frames, (0) = low

Definition at line 185 of file lpc17xx_ssp.h.

#define SSP_CR0_DSS (   n)    ((uint32_t)((n-1)&0xF))

Macro defines for CR0 registerSSP data size select, must be 4 bits to 16 bits

Definition at line 176 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_MICROWIRE   ((uint32_t)(2<<4))

SSP control 0 National Micro-wire mode

Definition at line 182 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_SPI   ((uint32_t)(0<<4))

SSP control 0 Motorola SPI mode

Definition at line 178 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_TI   ((uint32_t)(1<<4))

SSP control 0 TI synchronous serial mode

Definition at line 180 of file lpc17xx_ssp.h.

#define SSP_CR0_SCR (   n)    ((uint32_t)((n&0xFF)<<8))

SSP serial clock rate value load macro, divider rate is PERIPH_CLK / (cpsr * (SCR + 1))

Definition at line 191 of file lpc17xx_ssp.h.

#define SSP_CR1_BITMASK   ((uint32_t)(0x0F))

SSP CR1 bit mask

Definition at line 208 of file lpc17xx_ssp.h.

#define SSP_CR1_LBM_EN   ((uint32_t)(1<<0))

Macro defines for CR1 registerSSP control 1 loopback mode enable bit

Definition at line 199 of file lpc17xx_ssp.h.

#define SSP_CR1_SLAVE_EN   ((uint32_t)(1<<2))

SSP control 1 slave enable

Definition at line 203 of file lpc17xx_ssp.h.

#define SSP_CR1_SO_DISABLE   ((uint32_t)(1<<3))

SSP control 1 slave out disable bit, disables transmit line in slave mode

Definition at line 206 of file lpc17xx_ssp.h.

#define SSP_CR1_SSP_EN   ((uint32_t)(1<<1))

SSP control 1 enable bit

Definition at line 201 of file lpc17xx_ssp.h.

#define SSP_DMA_BITMASK   ((uint32_t)(0x03))

DMACR bit mask

Definition at line 302 of file lpc17xx_ssp.h.

#define SSP_DMA_RXDMA_EN   ((uint32_t)(1<<0))

Macro defines for DMACR registerSSP bit for enabling RX DMA

Definition at line 298 of file lpc17xx_ssp.h.

#define SSP_DMA_TXDMA_EN   ((uint32_t)(1<<1))

SSP bit for enabling TX DMA

Definition at line 300 of file lpc17xx_ssp.h.

#define SSP_DR_BITMASK (   n)    ((n)&0xFFFF)

Macro defines for DR registerSSP data bit mask

Definition at line 214 of file lpc17xx_ssp.h.

#define SSP_ICR_BITMASK   ((uint32_t)(0x03))

ICR bit mask

Definition at line 292 of file lpc17xx_ssp.h.

#define SSP_ICR_ROR   ((uint32_t)(1<<0))

Macro define for (ICR) Interrupt Clear registers Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt

Definition at line 287 of file lpc17xx_ssp.h.

#define SSP_ICR_RT   ((uint32_t)(1<<1))

Writing a 1 to this bit clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt

Definition at line 290 of file lpc17xx_ssp.h.

#define SSP_IMSC_BITMASK   ((uint32_t)(0x0F))

IMSC bit mask

Definition at line 252 of file lpc17xx_ssp.h.

#define SSP_IMSC_ROR   ((uint32_t)(1<<0))

Macro define for (IMSC) Interrupt Mask Set/Clear registersReceive Overrun

Definition at line 244 of file lpc17xx_ssp.h.

#define SSP_IMSC_RT   ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 246 of file lpc17xx_ssp.h.

#define SSP_IMSC_RX   ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 248 of file lpc17xx_ssp.h.

#define SSP_IMSC_TX   ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 250 of file lpc17xx_ssp.h.

#define SSP_MIS_BITMASK   ((uint32_t)(0x0F))

MIS bit mask

Definition at line 280 of file lpc17xx_ssp.h.

#define SSP_MIS_ROR   ((uint32_t)(1<<0))

Macro define for (MIS) Masked Interrupt Status registersReceive Overrun

Definition at line 272 of file lpc17xx_ssp.h.

#define SSP_MIS_RT   ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 274 of file lpc17xx_ssp.h.

#define SSP_MIS_RX   ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 276 of file lpc17xx_ssp.h.

#define SSP_MIS_TX   ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 278 of file lpc17xx_ssp.h.

#define SSP_RIS_BITMASK   ((uint32_t)(0x0F))

RIS bit mask

Definition at line 266 of file lpc17xx_ssp.h.

#define SSP_RIS_ROR   ((uint32_t)(1<<0))

Macro define for (RIS) Raw Interrupt Status registersReceive Overrun

Definition at line 258 of file lpc17xx_ssp.h.

#define SSP_RIS_RT   ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 260 of file lpc17xx_ssp.h.

#define SSP_RIS_RX   ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 262 of file lpc17xx_ssp.h.

#define SSP_RIS_TX   ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 264 of file lpc17xx_ssp.h.

#define SSP_SR_BITMASK   ((uint32_t)(0x1F))

SSP SR bit mask

Definition at line 230 of file lpc17xx_ssp.h.

#define SSP_SR_BSY   ((uint32_t)(1<<4))

SSP status SSP Busy bit

Definition at line 228 of file lpc17xx_ssp.h.

#define SSP_SR_RFF   ((uint32_t)(1<<3))

SSP status RX FIFO full bit

Definition at line 226 of file lpc17xx_ssp.h.

#define SSP_SR_RNE   ((uint32_t)(1<<2))

SSP status RX FIFO not empty bit

Definition at line 224 of file lpc17xx_ssp.h.

#define SSP_SR_TFE   ((uint32_t)(1<<0))

Macro defines for SR registerSSP status TX FIFO Empty bit

Definition at line 220 of file lpc17xx_ssp.h.

#define SSP_SR_TNF   ((uint32_t)(1<<1))

SSP status TX FIFO not full bit

Definition at line 222 of file lpc17xx_ssp.h.