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lpc17xx_i2c.c
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1 /***********************************************************************/
20 /* Peripheral group ----------------------------------------------------------- */
25 /* Includes ------------------------------------------------------------------- */
26 #include "lpc17xx_i2c.h"
27 #include "lpc17xx_clkpwr.h"
28 #include "lpc17xx_pinsel.h"
29 
30 
31 /* If this source file built with example, the LPC17xx FW library configuration
32  * file in each example directory ("lpc17xx_libcfg.h") must be included,
33  * otherwise the default FW library configuration file must be included instead
34  */
35 #ifdef __BUILD_WITH_EXAMPLE__
36 #include "lpc17xx_libcfg.h"
37 #else
38 #include "lpc17xx_libcfg_default.h"
39 #endif /* __BUILD_WITH_EXAMPLE__ */
40 
41 
42 #ifdef _I2C
43 
44 
45 /* Private Types -------------------------------------------------------------- */
53 typedef struct
54 {
55  uint32_t txrx_setup; /* Transmission setup */
56  int32_t dir; /* Current direction phase, 0 - write, 1 - read */
57 } I2C_CFG_T;
58 
63 /* Private Variables ---------------------------------------------------------- */
67 static I2C_CFG_T i2cdat[3];
68 
69 static uint32_t I2C_MasterComplete[3];
70 static uint32_t I2C_SlaveComplete[3];
71 
72 static uint32_t I2C_MonitorBufferIndex;
73 
74 /* Private Functions ---------------------------------------------------------- */
75 
76 /* Get I2C number */
77 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx);
78 
79 /* Generate a start condition on I2C bus (in master mode only) */
80 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx);
81 
82 /* Generate a stop condition on I2C bus (in master mode only) */
83 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx);
84 
85 /* I2C send byte subroutine */
86 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte);
87 
88 /* I2C get byte subroutine */
89 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack);
90 
91 /* I2C set clock (hz) */
92 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
93 
94 /*--------------------------------------------------------------------------------*/
95 /********************************************************************/
103 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx){
104  if (I2Cx == LPC_I2C0) {
105  return (0);
106  } else if (I2Cx == LPC_I2C1) {
107  return (1);
108  } else if (I2Cx == LPC_I2C2) {
109  return (2);
110  }
111  return (-1);
112 }
113 
114 /********************************************************************/
122 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx)
123 {
124  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
125  I2Cx->I2CONSET = I2C_I2CONSET_STA;
126 
127  // Wait for complete
128  while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
129  I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
130  return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
131 }
132 
133 /********************************************************************/
141 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx)
142 {
143 
144  /* Make sure start bit is not active */
145  if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
146  {
147  I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
148  }
149  I2Cx->I2CONSET = I2C_I2CONSET_STO;
150  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
151 }
152 
153 /********************************************************************/
162 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte)
163 {
164  /* Make sure start bit is not active */
165  if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
166  {
167  I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
168  }
169  I2Cx->I2DAT = databyte & I2C_I2DAT_BITMASK;
170  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
171 
172  while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
173  return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
174 }
175 
176 /********************************************************************/
186 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack)
187 {
188  if (ack == TRUE)
189  {
190  I2Cx->I2CONSET = I2C_I2CONSET_AA;
191  }
192  else
193  {
194  I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
195  }
196  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
197 
198  while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
199  *retdat = (uint8_t) (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
200  return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
201 }
202 
203 /*********************************************************************/
212 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock)
213 {
214  uint32_t temp = 0;
215 
216  CHECK_PARAM(PARAM_I2Cx(I2Cx));
217 
218  // Get PCLK of I2C controller
219  if (I2Cx == LPC_I2C0)
220  {
221  temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C0) / target_clock;
222  }
223  else if (I2Cx == LPC_I2C1)
224  {
225  temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock;
226  }
227  else if (I2Cx == LPC_I2C2)
228  {
229  temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock;
230  }
231 
232  /* Set the I2C clock value to register */
233  I2Cx->I2SCLH = (uint32_t)(temp / 2);
234  I2Cx->I2SCLL = (uint32_t)(temp - I2Cx->I2SCLH);
235 }
236 /* End of Private Functions --------------------------------------------------- */
237 
238 
239 /* Public Functions ----------------------------------------------------------- */
244 /********************************************************************/
254 void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
255 {
256  CHECK_PARAM(PARAM_I2Cx(I2Cx));
257 
258  if (I2Cx==LPC_I2C0)
259  {
260  /* Set up clock and power for I2C0 module */
262  /* As default, peripheral clock for I2C0 module
263  * is set to FCCLK / 2 */
265  }
266  else if (I2Cx==LPC_I2C1)
267  {
268  /* Set up clock and power for I2C1 module */
270  /* As default, peripheral clock for I2C1 module
271  * is set to FCCLK / 2 */
273  }
274  else if (I2Cx==LPC_I2C2)
275  {
276  /* Set up clock and power for I2C2 module */
278  /* As default, peripheral clock for I2C2 module
279  * is set to FCCLK / 2 */
281  }
282  else {
283  // Up-Support this device
284  return;
285  }
286 
287  /* Set clock rate */
288  I2C_SetClock(I2Cx, clockrate);
289  /* Set I2C operation to default */
291 }
292 
293 /*********************************************************************/
302 void I2C_DeInit(LPC_I2C_TypeDef* I2Cx)
303 {
304  CHECK_PARAM(PARAM_I2Cx(I2Cx));
305 
306  /* Disable I2C control */
308 
309  if (I2Cx==LPC_I2C0)
310  {
311  /* Disable power for I2C0 module */
313  }
314  else if (I2Cx==LPC_I2C1)
315  {
316  /* Disable power for I2C1 module */
318  }
319  else if (I2Cx==LPC_I2C2)
320  {
321  /* Disable power for I2C2 module */
323  }
324 }
325 
326 /*********************************************************************/
335 void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState)
336 {
338  CHECK_PARAM(PARAM_I2Cx(I2Cx));
339 
340  if (NewState == ENABLE)
341  {
342  I2Cx->I2CONSET = I2C_I2CONSET_I2EN;
343  }
344  else
345  {
347  }
348 }
349 
350 /*********************************************************************/
362 void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
363 {
364  if (NewState)
365  {
366  if(I2Cx == LPC_I2C0)
367  {
368  NVIC_EnableIRQ(I2C0_IRQn);
369  }
370  else if (I2Cx == LPC_I2C1)
371  {
372  NVIC_EnableIRQ(I2C1_IRQn);
373  }
374  else if (I2Cx == LPC_I2C2)
375  {
376  NVIC_EnableIRQ(I2C2_IRQn);
377  }
378  }
379  else
380  {
381  if(I2Cx == LPC_I2C0)
382  {
383  NVIC_DisableIRQ(I2C0_IRQn);
384  }
385  else if (I2Cx == LPC_I2C1)
386  {
387  NVIC_DisableIRQ(I2C1_IRQn);
388  }
389  else if (I2Cx == LPC_I2C2)
390  {
391  NVIC_DisableIRQ(I2C2_IRQn);
392  }
393  }
394  return;
395 }
396 
397 
398 /*********************************************************************/
407 {
408  int32_t tmp;
409  uint8_t returnCode;
410  I2C_M_SETUP_Type *txrx_setup;
411 
412  tmp = I2C_getNum(I2Cx);
413  txrx_setup = (I2C_M_SETUP_Type *) i2cdat[tmp].txrx_setup;
414 
415  returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
416  // Save current status
417  txrx_setup->status = returnCode;
418  // there's no relevant information
419  if (returnCode == I2C_I2STAT_NO_INF){
420  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
421  return;
422  }
423 
424  /* ----------------------------- TRANSMIT PHASE --------------------------*/
425  if (i2cdat[tmp].dir == 0){
426  switch (returnCode)
427  {
428  /* A start/repeat start condition has been transmitted -------------------*/
431  I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
432  /*
433  * If there's any transmit data, then start to
434  * send SLA+W right now, otherwise check whether if there's
435  * any receive data for next state.
436  */
437  if ((txrx_setup->tx_data != NULL) && (txrx_setup->tx_length != 0)){
438  I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1);
439  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
440  } else {
441  goto next_stage;
442  }
443  break;
444 
445  /* SLA+W has been transmitted, ACK has been received ----------------------*/
447  /* Data has been transmitted, ACK has been received */
449  /* Send more data */
450  if ((txrx_setup->tx_count < txrx_setup->tx_length) \
451  && (txrx_setup->tx_data != NULL)){
452  I2Cx->I2DAT = *(uint8_t *)(txrx_setup->tx_data + txrx_setup->tx_count);
453  txrx_setup->tx_count++;
454  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
455  }
456  // no more data, switch to next stage
457  else {
458 next_stage:
459  // change direction
460  i2cdat[tmp].dir = 1;
461  // Check if any data to receive
462  if ((txrx_setup->rx_length != 0) && (txrx_setup->rx_data != NULL)){
463  // check whether if we need to issue an repeat start
464  if ((txrx_setup->tx_length != 0) && (txrx_setup->tx_data != NULL)){
465  // Send out an repeat start command
466  I2Cx->I2CONSET = I2C_I2CONSET_STA;
468  }
469  // Don't need issue an repeat start, just goto send SLA+R
470  else {
471  goto send_slar;
472  }
473  }
474  // no more data send, the go to end stage now
475  else {
476  // success, goto end stage
477  txrx_setup->status |= I2C_SETUP_STATUS_DONE;
478  goto end_stage;
479  }
480  }
481  break;
482 
483  /* SLA+W has been transmitted, NACK has been received ----------------------*/
485  /* Data has been transmitted, NACK has been received -----------------------*/
487  // update status
488  txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
489  goto retry;
490  /* Arbitration lost in SLA+R/W or Data bytes -------------------------------*/
492  // update status
493  txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
494  default:
495  goto retry;
496  }
497  }
498 
499  /* ----------------------------- RECEIVE PHASE --------------------------*/
500  else if (i2cdat[tmp].dir == 1){
501  switch (returnCode){
502  /* A start/repeat start condition has been transmitted ---------------------*/
505  I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
506  /*
507  * If there's any receive data, then start to
508  * send SLA+R right now, otherwise check whether if there's
509  * any receive data for end of state.
510  */
511  if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_length != 0)){
512 send_slar:
513  I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1) | 0x01;
514  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
515  } else {
516  // Success, goto end stage
517  txrx_setup->status |= I2C_SETUP_STATUS_DONE;
518  goto end_stage;
519  }
520  break;
521 
522  /* SLA+R has been transmitted, ACK has been received -----------------*/
524  if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
525  /*Data will be received, ACK will be return*/
526  I2Cx->I2CONSET = I2C_I2CONSET_AA;
527  }
528  else {
529  /*Last data will be received, NACK will be return*/
530  I2Cx->I2CONCLR = I2C_I2CONSET_AA;
531  }
532  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
533  break;
534 
535  /* Data has been received, ACK has been returned ----------------------*/
537  // Note save data and increase counter first, then check later
538  /* Save data */
539  if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
540  *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
541  txrx_setup->rx_count++;
542  }
543  if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
544  /*Data will be received, ACK will be return*/
545  I2Cx->I2CONSET = I2C_I2CONSET_AA;
546  }
547  else {
548  /*Last data will be received, NACK will be return*/
549  I2Cx->I2CONCLR = I2C_I2CONSET_AA;
550  }
551 
552  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
553  break;
554 
555  /* Data has been received, NACK has been return -------------------------*/
557  /* Save the last data */
558  if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
559  *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
560  txrx_setup->rx_count++;
561  }
562  // success, go to end stage
563  txrx_setup->status |= I2C_SETUP_STATUS_DONE;
564  goto end_stage;
565 
566  /* SLA+R has been transmitted, NACK has been received ------------------*/
568  // update status
569  txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
570  goto retry;
571 
572  /* Arbitration lost ----------------------------------------------------*/
574  // update status
575  txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
576  default:
577 retry:
578  // check if retransmission is available
579  if (txrx_setup->retransmissions_count < txrx_setup->retransmissions_max){
580  // Clear tx count
581  txrx_setup->tx_count = 0;
582  I2Cx->I2CONSET = I2C_I2CONSET_STA;
584  txrx_setup->retransmissions_count++;
585  }
586  // End of stage
587  else {
588 end_stage:
589  // Disable interrupt
590  I2C_IntCmd(I2Cx, 0);
591  // Send stop
592  I2C_Stop(I2Cx);
593 
594  I2C_MasterComplete[tmp] = TRUE;
595  }
596  break;
597  }
598  }
599 }
600 
601 
602 /*********************************************************************/
611 {
612  int32_t tmp;
613  uint8_t returnCode;
614  I2C_S_SETUP_Type *txrx_setup;
615  uint32_t timeout;
616 
617  tmp = I2C_getNum(I2Cx);
618  txrx_setup = (I2C_S_SETUP_Type *) i2cdat[tmp].txrx_setup;
619 
620  returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
621  // Save current status
622  txrx_setup->status = returnCode;
623  // there's no relevant information
624  if (returnCode == I2C_I2STAT_NO_INF){
625  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
626  return;
627  }
628 
629 
630  switch (returnCode)
631  {
632 
633  /* No status information */
634  case I2C_I2STAT_NO_INF:
635  I2Cx->I2CONSET = I2C_I2CONSET_AA;
636  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
637  break;
638 
639  /* Reading phase -------------------------------------------------------- */
640  /* Own SLA+R has been received, ACK has been returned */
642  /* General call address has been received, ACK has been returned */
644  I2Cx->I2CONSET = I2C_I2CONSET_AA;
645  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
646  break;
647 
648  /* Previously addressed with own SLA;
649  * DATA byte has been received;
650  * ACK has been returned */
652  /* DATA has been received, ACK hasn been return */
654  /*
655  * All data bytes that over-flow the specified receive
656  * data length, just ignore them.
657  */
658  if ((txrx_setup->rx_count < txrx_setup->rx_length) \
659  && (txrx_setup->rx_data != NULL)){
660  *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (uint8_t)I2Cx->I2DAT;
661  txrx_setup->rx_count++;
662  }
663  I2Cx->I2CONSET = I2C_I2CONSET_AA;
664  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
665  break;
666 
667  /* Previously addressed with own SLA;
668  * DATA byte has been received;
669  * NOT ACK has been returned */
671  /* DATA has been received, NOT ACK has been returned */
673  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
674  break;
675 
676  /*
677  * Note that: Return code only let us know a stop condition mixed
678  * with a repeat start condition in the same code value.
679  * So we should provide a time-out. In case this is really a stop
680  * condition, this will return back after time out condition. Otherwise,
681  * next session that is slave receive data will be completed.
682  */
683 
684  /* A Stop or a repeat start condition */
686  // Temporally lock the interrupt for timeout condition
687  I2C_IntCmd(I2Cx, 0);
688  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
689  // enable time out
690  timeout = I2C_SLAVE_TIME_OUT;
691  while(1){
692  if (I2Cx->I2CONSET & I2C_I2CONSET_SI){
693  // re-Enable interrupt
694  I2C_IntCmd(I2Cx, 1);
695  break;
696  } else {
697  timeout--;
698  if (timeout == 0){
699  // timeout occur, it's really a stop condition
700  txrx_setup->status |= I2C_SETUP_STATUS_DONE;
701  goto s_int_end;
702  }
703  }
704  }
705  break;
706 
707  /* Writing phase -------------------------------------------------------- */
708  /* Own SLA+R has been received, ACK has been returned */
710  /* Data has been transmitted, ACK has been received */
712  /*
713  * All data bytes that over-flow the specified receive
714  * data length, just ignore them.
715  */
716  if ((txrx_setup->tx_count < txrx_setup->tx_length) \
717  && (txrx_setup->tx_data != NULL)){
718  I2Cx->I2DAT = *(uint8_t *) (txrx_setup->tx_data + txrx_setup->tx_count);
719  txrx_setup->tx_count++;
720  }
721  I2Cx->I2CONSET = I2C_I2CONSET_AA;
722  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
723  break;
724 
725  /* Data has been transmitted, NACK has been received,
726  * that means there's no more data to send, exit now */
727  /*
728  * Note: Don't wait for stop event since in slave transmit mode,
729  * since there no proof lets us know when a stop signal has been received
730  * on slave side.
731  */
733  I2Cx->I2CONSET = I2C_I2CONSET_AA;
734  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
735  txrx_setup->status |= I2C_SETUP_STATUS_DONE;
736  goto s_int_end;
737 
738  // Other status must be captured
739  default:
740 s_int_end:
741  // Disable interrupt
742  I2C_IntCmd(I2Cx, 0);
744  I2C_SlaveComplete[tmp] = TRUE;
745  break;
746  }
747 }
748 
749 /*********************************************************************/
773 {
774  uint8_t *txdat;
775  uint8_t *rxdat;
776  uint32_t CodeStatus;
777  uint8_t tmp;
778 
779  // reset all default state
780  txdat = (uint8_t *) TransferCfg->tx_data;
781  rxdat = (uint8_t *) TransferCfg->rx_data;
782  // Reset I2C setup value to default state
783  TransferCfg->tx_count = 0;
784  TransferCfg->rx_count = 0;
785  TransferCfg->status = 0;
786 
787  if (Opt == I2C_TRANSFER_POLLING){
788 
789  /* First Start condition -------------------------------------------------------------- */
790  TransferCfg->retransmissions_count = 0;
791 retry:
792  // reset all default state
793  txdat = (uint8_t *) TransferCfg->tx_data;
794  rxdat = (uint8_t *) TransferCfg->rx_data;
795  // Reset I2C setup value to default state
796  TransferCfg->tx_count = 0;
797  TransferCfg->rx_count = 0;
798  CodeStatus = 0;
799 
800  // Start command
801  CodeStatus = I2C_Start(I2Cx);
802  if ((CodeStatus != I2C_I2STAT_M_TX_START) \
803  && (CodeStatus != I2C_I2STAT_M_TX_RESTART)){
804  TransferCfg->retransmissions_count++;
805  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
806  // save status
807  TransferCfg->status = CodeStatus;
808  goto error;
809  } else {
810  goto retry;
811  }
812  }
813 
814  /* In case of sending data first --------------------------------------------------- */
815  if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL)){
816 
817  /* Send slave address + WR direction bit = 0 ----------------------------------- */
818  CodeStatus = I2C_SendByte(I2Cx, (TransferCfg->sl_addr7bit << 1));
819  if (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK){
820  TransferCfg->retransmissions_count++;
821  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
822  // save status
823  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
824  goto error;
825  } else {
826  goto retry;
827  }
828  }
829 
830  /* Send a number of data bytes ---------------------------------------- */
831  while (TransferCfg->tx_count < TransferCfg->tx_length)
832  {
833  CodeStatus = I2C_SendByte(I2Cx, *txdat);
834  if (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK){
835  TransferCfg->retransmissions_count++;
836  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
837  // save status
838  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
839  goto error;
840  } else {
841  goto retry;
842  }
843  }
844 
845  txdat++;
846  TransferCfg->tx_count++;
847  }
848  }
849 
850  /* Second Start condition (Repeat Start) ------------------------------------------- */
851  if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL) \
852  && (TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
853 
854  CodeStatus = I2C_Start(I2Cx);
855  if ((CodeStatus != I2C_I2STAT_M_RX_START) \
856  && (CodeStatus != I2C_I2STAT_M_RX_RESTART)){
857  TransferCfg->retransmissions_count++;
858  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
859  // Update status
860  TransferCfg->status = CodeStatus;
861  goto error;
862  } else {
863  goto retry;
864  }
865  }
866  }
867 
868  /* Then, start reading after sending data -------------------------------------- */
869  if ((TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
870  /* Send slave address + RD direction bit = 1 ----------------------------------- */
871 
872  CodeStatus = I2C_SendByte(I2Cx, ((TransferCfg->sl_addr7bit << 1) | 0x01));
873  if (CodeStatus != I2C_I2STAT_M_RX_SLAR_ACK){
874  TransferCfg->retransmissions_count++;
875  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
876  // update status
877  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
878  goto error;
879  } else {
880  goto retry;
881  }
882  }
883 
884  /* Receive a number of data bytes ------------------------------------------------- */
885  while (TransferCfg->rx_count < TransferCfg->rx_length){
886 
887  /*
888  * Note that: if data length is only one, the master should not
889  * issue an ACK signal on bus after reading to avoid of next data frame
890  * on slave side
891  */
892  if (TransferCfg->rx_count < (TransferCfg->rx_length - 1)){
893  // Issue an ACK signal for next data frame
894  CodeStatus = I2C_GetByte(I2Cx, &tmp, 1);
895  if (CodeStatus != I2C_I2STAT_M_RX_DAT_ACK){
896  TransferCfg->retransmissions_count++;
897  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
898  // update status
899  TransferCfg->status = CodeStatus;
900  goto error;
901  } else {
902  goto retry;
903  }
904  }
905  } else {
906  // Do not issue an ACK signal
907  CodeStatus = I2C_GetByte(I2Cx, &tmp, 0);
908  if (CodeStatus != I2C_I2STAT_M_RX_DAT_NACK){
909  TransferCfg->retransmissions_count++;
910  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
911  // update status
912  TransferCfg->status = CodeStatus;
913  goto error;
914  } else {
915  goto retry;
916  }
917  }
918  }
919  *rxdat++ = tmp;
920  TransferCfg->rx_count++;
921  }
922  }
923 
924  /* Send STOP condition ------------------------------------------------- */
925  I2C_Stop(I2Cx);
926  return SUCCESS;
927 
928 error:
929  // Send stop condition
930  I2C_Stop(I2Cx);
931  return ERROR;
932  }
933 
934  else if (Opt == I2C_TRANSFER_INTERRUPT){
935  // Setup tx_rx data, callback and interrupt handler
936  tmp = I2C_getNum(I2Cx);
937  i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
938  // Set direction phase, write first
939  i2cdat[tmp].dir = 0;
940 
941  /* First Start condition -------------------------------------------------------------- */
942  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
943  I2Cx->I2CONSET = I2C_I2CONSET_STA;
944  I2C_IntCmd(I2Cx, 1);
945 
946  return (SUCCESS);
947  }
948 
949  return ERROR;
950 }
951 
952 /*********************************************************************/
985 {
986  uint8_t *txdat;
987  uint8_t *rxdat;
988  uint32_t CodeStatus = 0;
989  uint32_t timeout;
990  int32_t time_en;
991  int32_t tmp;
992 
993  // reset all default state
994  txdat = (uint8_t *) TransferCfg->tx_data;
995  rxdat = (uint8_t *) TransferCfg->rx_data;
996  // Reset I2C setup value to default state
997  TransferCfg->tx_count = 0;
998  TransferCfg->rx_count = 0;
999  TransferCfg->status = 0;
1000 
1001 
1002  // Polling option
1003  if (Opt == I2C_TRANSFER_POLLING){
1004 
1005  /* Set AA bit to ACK command on I2C bus */
1006  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1007  /* Clear SI bit to be ready ... */
1009 
1010  time_en = 0;
1011  timeout = 0;
1012 
1013  while (1)
1014  {
1015  /* Check SI flag ready */
1016  if (I2Cx->I2CONSET & I2C_I2CONSET_SI)
1017  {
1018  time_en = 0;
1019 
1020  switch (CodeStatus = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK))
1021  {
1022 
1023  /* No status information */
1024  case I2C_I2STAT_NO_INF:
1025  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1026  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1027  break;
1028 
1029  /* Reading phase -------------------------------------------------------- */
1030  /* Own SLA+R has been received, ACK has been returned */
1032  /* General call address has been received, ACK has been returned */
1034  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1035  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1036  break;
1037 
1038  /* Previously addressed with own SLA;
1039  * DATA byte has been received;
1040  * ACK has been returned */
1042  /* DATA has been received, ACK hasn been return */
1044  /*
1045  * All data bytes that over-flow the specified receive
1046  * data length, just ignore them.
1047  */
1048  if ((TransferCfg->rx_count < TransferCfg->rx_length) \
1049  && (TransferCfg->rx_data != NULL)){
1050  *rxdat++ = (uint8_t)I2Cx->I2DAT;
1051  TransferCfg->rx_count++;
1052  }
1053  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1054  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1055  break;
1056 
1057  /* Previously addressed with own SLA;
1058  * DATA byte has been received;
1059  * NOT ACK has been returned */
1061  /* DATA has been received, NOT ACK has been returned */
1063  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1064  break;
1065 
1066  /*
1067  * Note that: Return code only let us know a stop condition mixed
1068  * with a repeat start condition in the same code value.
1069  * So we should provide a time-out. In case this is really a stop
1070  * condition, this will return back after time out condition. Otherwise,
1071  * next session that is slave receive data will be completed.
1072  */
1073 
1074  /* A Stop or a repeat start condition */
1076  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1077  // enable time out
1078  time_en = 1;
1079  timeout = 0;
1080  break;
1081 
1082  /* Writing phase -------------------------------------------------------- */
1083  /* Own SLA+R has been received, ACK has been returned */
1085  /* Data has been transmitted, ACK has been received */
1087  /*
1088  * All data bytes that over-flow the specified receive
1089  * data length, just ignore them.
1090  */
1091  if ((TransferCfg->tx_count < TransferCfg->tx_length) \
1092  && (TransferCfg->tx_data != NULL)){
1093  I2Cx->I2DAT = *txdat++;
1094  TransferCfg->tx_count++;
1095  }
1096  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1097  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1098  break;
1099 
1100  /* Data has been transmitted, NACK has been received,
1101  * that means there's no more data to send, exit now */
1102  /*
1103  * Note: Don't wait for stop event since in slave transmit mode,
1104  * since there no proof lets us know when a stop signal has been received
1105  * on slave side.
1106  */
1108  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1109  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1110  // enable time out
1111  time_en = 1;
1112  timeout = 0;
1113  break;
1114 
1115  // Other status must be captured
1116  default:
1117  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1118  goto s_error;
1119  }
1120  } else if (time_en){
1121  if (timeout++ > I2C_SLAVE_TIME_OUT){
1122  // it's really a stop condition, goto end stage
1123  goto s_end_stage;
1124  }
1125  }
1126  }
1127 
1128 s_end_stage:
1129  /* Clear AA bit to disable ACK on I2C bus */
1130  I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
1131  // Check if there's no error during operation
1132  // Update status
1133  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
1134  return SUCCESS;
1135 
1136 s_error:
1137  /* Clear AA bit to disable ACK on I2C bus */
1138  I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
1139  // Update status
1140  TransferCfg->status = CodeStatus;
1141  return ERROR;
1142  }
1143 
1144  else if (Opt == I2C_TRANSFER_INTERRUPT){
1145  // Setup tx_rx data, callback and interrupt handler
1146  tmp = I2C_getNum(I2Cx);
1147  i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
1148  // Set direction phase, read first
1149  i2cdat[tmp].dir = 1;
1150 
1151  // Enable AA
1152  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1154  I2C_IntCmd(I2Cx, 1);
1155 
1156  return (SUCCESS);
1157  }
1158 
1159  return ERROR;
1160 }
1161 
1162 /*********************************************************************/
1174 void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
1175 {
1176  uint32_t tmp;
1177  CHECK_PARAM(PARAM_I2Cx(I2Cx));
1178  CHECK_PARAM(PARAM_I2C_SLAVEADDR_CH(OwnSlaveAddrConfigStruct->SlaveAddrChannel));
1179  CHECK_PARAM(PARAM_FUNCTIONALSTATE(OwnSlaveAddrConfigStruct->GeneralCallState));
1180 
1181  tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
1182  | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK;
1183  switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel)
1184  {
1185  case 0:
1186  I2Cx->I2ADR0 = tmp;
1187  I2Cx->I2MASK0 = I2C_I2MASK_MASK((uint32_t) \
1188  (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
1189  break;
1190  case 1:
1191  I2Cx->I2ADR1 = tmp;
1192  I2Cx->I2MASK1 = I2C_I2MASK_MASK((uint32_t) \
1193  (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
1194  break;
1195  case 2:
1196  I2Cx->I2ADR2 = tmp;
1197  I2Cx->I2MASK2 = I2C_I2MASK_MASK((uint32_t) \
1198  (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
1199  break;
1200  case 3:
1201  I2Cx->I2ADR3 = tmp;
1202  I2Cx->I2MASK3 = I2C_I2MASK_MASK((uint32_t) \
1203  (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
1204  break;
1205  }
1206 }
1207 
1208 
1209 /*********************************************************************/
1227 void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
1228 {
1229  CHECK_PARAM(PARAM_I2Cx(I2Cx));
1230  CHECK_PARAM(PARAM_I2C_MONITOR_CFG(MonitorCfgType));
1232 
1233  if (NewState == ENABLE)
1234  {
1235  I2Cx->MMCTRL |= MonitorCfgType;
1236  }
1237  else
1238  {
1239  I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK;
1240  }
1241 }
1242 
1243 
1244 /*********************************************************************/
1256 {
1257  CHECK_PARAM(PARAM_I2Cx(I2Cx));
1259 
1260  if (NewState == ENABLE)
1261  {
1262  I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;
1263  I2Cx->I2CONSET = I2C_I2CONSET_AA;
1265  }
1266  else
1267  {
1270  }
1271  I2C_MonitorBufferIndex = 0;
1272 }
1273 
1274 
1275 /*********************************************************************/
1291 {
1292  CHECK_PARAM(PARAM_I2Cx(I2Cx));
1293  return ((uint8_t)(I2Cx->I2DATA_BUFFER));
1294 }
1295 
1296 /*********************************************************************/
1311 BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
1312 {
1313  BOOL_8 ret=FALSE;
1314 
1315  I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
1316 
1317  buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->I2DATA_BUFFER);
1318  I2C_MonitorBufferIndex++;
1319  if(I2C_MonitorBufferIndex >= size)
1320  {
1321  ret = TRUE;
1322  }
1323  return ret;
1324 }
1325 /*********************************************************************/
1336 {
1337  uint32_t retval, tmp;
1338  tmp = I2C_getNum(I2Cx);
1339  retval = I2C_MasterComplete[tmp];
1340  I2C_MasterComplete[tmp] = FALSE;
1341  return retval;
1342 }
1343 
1344 /*********************************************************************/
1353 {
1354  uint32_t retval, tmp;
1355  tmp = I2C_getNum(I2Cx);
1356  retval = I2C_SlaveComplete[tmp];
1357  I2C_SlaveComplete[tmp] = FALSE;
1358  return retval;
1359 }
1360 
1361 
1362 
1367 #endif /* _I2C */
1368 
1373 /* --------------------------------- End Of File ------------------------------ */