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Macros
I2C Private Macros
I2C

Macros

#define I2C_I2CONSET_AA   ((0x04))
 
#define I2C_I2CONSET_SI   ((0x08))
 
#define I2C_I2CONSET_STO   ((0x10))
 
#define I2C_I2CONSET_STA   ((0x20))
 
#define I2C_I2CONSET_I2EN   ((0x40))
 
#define I2C_I2CONCLR_AAC   ((1<<2))
 
#define I2C_I2CONCLR_SIC   ((1<<3))
 
#define I2C_I2CONCLR_STAC   ((1<<5))
 
#define I2C_I2CONCLR_I2ENC   ((1<<6))
 
#define I2C_STAT_CODE_BITMASK   ((0xF8))
 
#define I2C_I2STAT_NO_INF   ((0xF8))
 
#define I2C_I2STAT_M_TX_START   ((0x08))
 
#define I2C_I2STAT_M_TX_RESTART   ((0x10))
 
#define I2C_I2STAT_M_TX_SLAW_ACK   ((0x18))
 
#define I2C_I2STAT_M_TX_SLAW_NACK   ((0x20))
 
#define I2C_I2STAT_M_TX_DAT_ACK   ((0x28))
 
#define I2C_I2STAT_M_TX_DAT_NACK   ((0x30))
 
#define I2C_I2STAT_M_TX_ARB_LOST   ((0x38))
 
#define I2C_I2STAT_M_RX_START   ((0x08))
 
#define I2C_I2STAT_M_RX_RESTART   ((0x10))
 
#define I2C_I2STAT_M_RX_ARB_LOST   ((0x38))
 
#define I2C_I2STAT_M_RX_SLAR_ACK   ((0x40))
 
#define I2C_I2STAT_M_RX_SLAR_NACK   ((0x48))
 
#define I2C_I2STAT_M_RX_DAT_ACK   ((0x50))
 
#define I2C_I2STAT_M_RX_DAT_NACK   ((0x58))
 
#define I2C_I2STAT_S_RX_SLAW_ACK   ((0x60))
 
#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA   ((0x68))
 
#define I2C_I2STAT_S_RX_GENCALL_ACK   ((0x70))
 
#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL   ((0x78))
 
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK   ((0x80))
 
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK   ((0x88))
 
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK   ((0x90))
 
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK   ((0x98))
 
#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))
 
#define I2C_I2STAT_S_TX_SLAR_ACK   ((0xA8))
 
#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA   ((0xB0))
 
#define I2C_I2STAT_S_TX_DAT_ACK   ((0xB8))
 
#define I2C_I2STAT_S_TX_DAT_NACK   ((0xC0))
 
#define I2C_I2STAT_S_TX_LAST_DAT_ACK   ((0xC8))
 
#define I2C_SLAVE_TIME_OUT   0x10000UL
 
#define I2C_I2DAT_BITMASK   ((0xFF))
 
#define I2C_I2DAT_IDLE_CHAR   (0xFF)
 
#define I2C_I2MMCTRL_MM_ENA   ((1<<0))
 
#define I2C_I2MMCTRL_ENA_SCL   ((1<<1))
 
#define I2C_I2MMCTRL_MATCH_ALL   ((1<<2))
 
#define I2C_I2MMCTRL_BITMASK   ((0x07))
 
#define I2DATA_BUFFER_BITMASK   ((0xFF))
 
#define I2C_I2ADR_GC   ((1<<0))
 
#define I2C_I2ADR_BITMASK   ((0xFF))
 
#define I2C_I2MASK_MASK(n)   ((n&0xFE))
 
#define I2C_I2SCLH_BITMASK   ((0xFFFF))
 
#define I2C_I2SCLL_BITMASK   ((0xFFFF))
 
#define I2C_SETUP_STATUS_ARBF   (1<<8)
 
#define I2C_SETUP_STATUS_NOACKF   (1<<9)
 
#define I2C_SETUP_STATUS_DONE   (1<<10)
 
#define I2C_MONITOR_CFG_SCL_OUTPUT   I2C_I2MMCTRL_ENA_SCL
 
#define I2C_MONITOR_CFG_MATCHALL   I2C_I2MMCTRL_MATCH_ALL
 
#define PARAM_I2C_SLAVEADDR_CH(n)   ((n>=0) && (n<=3))
 
#define PARAM_I2Cx(n)
 
#define PARAM_I2C_MONITOR_CFG(n)   ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))
 

Detailed Description

Macro Definition Documentation

#define I2C_I2ADR_BITMASK   ((0xFF))

I2C Slave Address registers bit mask

Definition at line 196 of file lpc17xx_i2c.h.

#define I2C_I2ADR_GC   ((1<<0))

I2C Slave Address registers definitionGeneral Call enable bit

Definition at line 194 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_AAC   ((1<<2))

I2C Control Clear register descriptionAssert acknowledge Clear bit

Definition at line 60 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_I2ENC   ((1<<6))

I2C interface Disable bit

Definition at line 66 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_SIC   ((1<<3))

I2C interrupt Clear bit

Definition at line 62 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_STAC   ((1<<5))

START flag Clear bit

Definition at line 64 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_AA   ((0x04))

I2C Control Set register descriptionAssert acknowledge flag

Definition at line 50 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_I2EN   ((0x40))

I2C interface enable

Definition at line 54 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_SI   ((0x08))

I2C interrupt flag

Definition at line 51 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STA   ((0x20))

START flag

Definition at line 53 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STO   ((0x10))

STOP flag

Definition at line 52 of file lpc17xx_i2c.h.

#define I2C_I2DAT_BITMASK   ((0xFF))

I2C Data register definitionMask for I2DAT register

Definition at line 169 of file lpc17xx_i2c.h.

#define I2C_I2DAT_IDLE_CHAR   (0xFF)

Idle data value will be send out in slave mode in case of the actual expecting data requested from the master is greater than its sending data length that can be supported

Definition at line 174 of file lpc17xx_i2c.h.

#define I2C_I2MASK_MASK (   n)    ((n&0xFE))

I2C Mask Register definitionI2C Mask Register mask field

Definition at line 202 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_BITMASK   ((0x07))

Mask for I2MMCTRL register

Definition at line 182 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_ENA_SCL   ((1<<1))

SCL output enable

Definition at line 180 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MATCH_ALL   ((1<<2))

Select interrupt register match

Definition at line 181 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MM_ENA   ((1<<0))

I2C Monitor mode control register descriptionMonitor mode enable

Definition at line 179 of file lpc17xx_i2c.h.

#define I2C_I2SCLH_BITMASK   ((0xFFFF))

I2C SCL HIGH duty cycle Register definitionI2C SCL HIGH duty cycle Register bit mask

Definition at line 208 of file lpc17xx_i2c.h.

#define I2C_I2SCLL_BITMASK   ((0xFFFF))

I2C SCL LOW duty cycle Register definitionI2C SCL LOW duty cycle Register bit mask

Definition at line 214 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_ARB_LOST   ((0x38))

Arbitration lost

Definition at line 101 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_ACK   ((0x50))

Data has been received, ACK has been returned

Definition at line 107 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_NACK   ((0x58))

Data has been received, NACK has been return

Definition at line 109 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_RESTART   ((0x10))

A repeat start condition has been transmitted

Definition at line 99 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_ACK   ((0x40))

SLA+R has been transmitted, ACK has been received

Definition at line 103 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_NACK   ((0x48))

SLA+R has been transmitted, NACK has been received

Definition at line 105 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_START   ((0x08))

A start condition has been transmitted

Definition at line 97 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_ARB_LOST   ((0x38))

Arbitration lost in SLA+R/W or Data bytes

Definition at line 93 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_ACK   ((0x28))

Data has been transmitted, ACK has been received

Definition at line 89 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_NACK   ((0x30))

Data has been transmitted, NACK has been received

Definition at line 91 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_RESTART   ((0x10))

A repeat start condition has been transmitted

Definition at line 83 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_ACK   ((0x18))

SLA+W has been transmitted, ACK has been received

Definition at line 85 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_NACK   ((0x20))

SLA+W has been transmitted, NACK has been received

Definition at line 87 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_START   ((0x08))

A start condition has been transmitted

Definition at line 81 of file lpc17xx_i2c.h.

#define I2C_I2STAT_NO_INF   ((0xF8))

No relevant information

Definition at line 77 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL   ((0x78))

Arbitration lost in SLA+R/W (GENERAL CALL) as master

Definition at line 124 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA   ((0x68))

Arbitration lost in SLA+R/W as master

Definition at line 116 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_GENCALL_ACK   ((0x70))

Own SLA+W has been received, ACK returned General call address has been received, ACK has been returned

Definition at line 121 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK   ((0x90))

Previously addressed with General Call; Data has been received and ACK has been return

Definition at line 136 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK   ((0x98))

Previously addressed with General Call; Data has been received and NOT ACK has been return

Definition at line 139 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK   ((0x80))

General call address has been received, ACK has been returned Previously addressed with own SLV address; Data has been received, ACK has been return

Definition at line 130 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK   ((0x88))

Previously addressed with own SLA; Data has been received and NOT ACK has been return

Definition at line 133 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_SLAW_ACK   ((0x60))

Own slave address has been received, ACK has been returned

Definition at line 113 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))

A STOP condition or repeated START condition has been received while still addressed as SLV/REC (Slave Receive) or SLV/TRX (Slave Transmit)

Definition at line 143 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA   ((0xB0))

Arbitration lost in SLA+R/W as master

Definition at line 150 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_ACK   ((0xB8))

Own SLA+R has been received, ACK has been returned Data has been transmitted, ACK has been received

Definition at line 155 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_NACK   ((0xC0))

Data has been transmitted, NACK has been received

Definition at line 157 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_LAST_DAT_ACK   ((0xC8))

Last data byte in I2DAT has been transmitted (AA = 0); ACK has been received

Definition at line 160 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_SLAR_ACK   ((0xA8))

Slave transmit mode Own SLA+R has been received, ACK has been returned

Definition at line 147 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_MATCHALL   I2C_I2MMCTRL_MATCH_ALL

Select interrupt register match

Definition at line 225 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_SCL_OUTPUT   I2C_I2MMCTRL_ENA_SCL

I2C monitor control configuration definesSCL output enable

Definition at line 224 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_ARBF   (1<<8)

Arbitration false

Definition at line 217 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_DONE   (1<<10)

Status DONE

Definition at line 219 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_NOACKF   (1<<9)

No ACK returned

Definition at line 218 of file lpc17xx_i2c.h.

#define I2C_SLAVE_TIME_OUT   0x10000UL

Time out in case of using I2C slave mode

Definition at line 163 of file lpc17xx_i2c.h.

#define I2C_STAT_CODE_BITMASK   ((0xF8))

I2C Status Code definition (I2C Status register)

Definition at line 72 of file lpc17xx_i2c.h.

#define I2DATA_BUFFER_BITMASK   ((0xFF))

I2C Data buffer register descriptionI2C Data buffer register bit mask

Definition at line 188 of file lpc17xx_i2c.h.

#define PARAM_I2C_MONITOR_CFG (   n)    ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Definition at line 237 of file lpc17xx_i2c.h.

#define PARAM_I2C_SLAVEADDR_CH (   n)    ((n>=0) && (n<=3))

Definition at line 229 of file lpc17xx_i2c.h.

#define PARAM_I2Cx (   n)
Value:
((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C2)))

Macro to determine if it is valid SSP port number

Definition at line 232 of file lpc17xx_i2c.h.