uc-sdk
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CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series. More...
Go to the source code of this file.
Macros | |
#define | CLOCK_SETUP 1 |
#define | SCS_Val 0x00000020 |
#define | CLKSRCSEL_Val 0x00000001 |
#define | PLL0_SETUP 1 |
#define | PLL0CFG_Val 0x00050063 |
#define | PLL1_SETUP 1 |
#define | PLL1CFG_Val 0x00000023 |
#define | CCLKCFG_Val 0x00000003 |
#define | USBCLKCFG_Val 0x00000000 |
#define | PCLKSEL0_Val 0x00000000 |
#define | PCLKSEL1_Val 0x00000000 |
#define | PCONP_Val 0x042887DE |
#define | CLKOUTCFG_Val 0x00000000 |
#define | FLASH_SETUP 1 |
#define | FLASHCFG_Val 0x0000303A |
#define | CHECK_RANGE(val, min, max) ((val < min) || (val > max)) |
#define | CHECK_RSVD(val, mask) (val & mask) |
#define | XTAL (12000000UL) /* Oscillator frequency */ |
#define | OSC_CLK ( XTAL) /* Main oscillator frequency */ |
#define | RTC_CLK ( 32768UL) /* RTC oscillator frequency */ |
#define | IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ |
#define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1) |
#define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) |
#define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N) |
#define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) |
#define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) |
Functions | |
void | SystemCoreClockUpdate (void) |
Updates the SystemCoreClock with current core Clock retrieved from cpu registers. More... | |
void | SystemInit (void) |
Setup the microcontroller system. Initialize the System. More... | |
Variables | |
uint32_t | SystemCoreClock = __CORE_CLK |
CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.
Definition in file system_LPC17xx.c.