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lpc17xx_clkpwr.c
Go to the documentation of this file.
1
/***********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/* Includes ------------------------------------------------------------------- */
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#include "
lpc17xx_clkpwr.h
"
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/* Public Functions ----------------------------------------------------------- */
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/*********************************************************************/
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void
CLKPWR_SetPCLKDiv
(uint32_t ClkType, uint32_t DivVal)
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{
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uint32_t bitpos;
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bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
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/* PCLKSEL0 selected */
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if
(ClkType < 32)
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{
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/* Clear two bit at bit position */
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LPC_SC
->PCLKSEL0 &= (~(
CLKPWR_PCLKSEL_BITMASK
(bitpos)));
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/* Set two selected bit */
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LPC_SC
->PCLKSEL0 |= (
CLKPWR_PCLKSEL_SET
(bitpos, DivVal));
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}
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/* PCLKSEL1 selected */
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else
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{
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/* Clear two bit at bit position */
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LPC_SC
->PCLKSEL1 &= ~(
CLKPWR_PCLKSEL_BITMASK
(bitpos));
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/* Set two selected bit */
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LPC_SC
->PCLKSEL1 |= (
CLKPWR_PCLKSEL_SET
(bitpos, DivVal));
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}
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}
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/*********************************************************************/
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uint32_t
CLKPWR_GetPCLKSEL
(uint32_t ClkType)
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{
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uint32_t bitpos, retval;
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if
(ClkType < 32)
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{
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bitpos = ClkType;
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retval =
LPC_SC
->PCLKSEL0;
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}
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else
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{
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bitpos = ClkType - 32;
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retval =
LPC_SC
->PCLKSEL1;
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}
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retval =
CLKPWR_PCLKSEL_GET
(bitpos, retval);
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return
retval;
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}
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/*********************************************************************/
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uint32_t
CLKPWR_GetPCLK
(uint32_t ClkType)
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{
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uint32_t retval, div;
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retval =
SystemCoreClock
;
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div =
CLKPWR_GetPCLKSEL
(ClkType);
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switch
(div)
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{
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case
0:
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div = 4;
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break
;
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case
1:
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div = 1;
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break
;
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case
2:
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div = 2;
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break
;
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case
3:
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div = 8;
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break
;
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}
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retval /= div;
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return
retval;
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}
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/*********************************************************************/
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void
CLKPWR_ConfigPPWR
(uint32_t PPType,
FunctionalState
NewState)
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{
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if
(NewState ==
ENABLE
)
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{
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LPC_SC
->PCONP |= PPType &
CLKPWR_PCONP_BITMASK
;
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}
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else
if
(NewState ==
DISABLE
)
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{
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LPC_SC
->PCONP &= (~PPType) &
CLKPWR_PCONP_BITMASK
;
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}
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}
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/*********************************************************************/
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void
CLKPWR_Sleep
(
void
)
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{
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LPC_SC
->PCON = 0x00;
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/* Sleep Mode*/
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__WFI();
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}
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/*********************************************************************/
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void
CLKPWR_DeepSleep
(
void
)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB
->SCR = 0x4;
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LPC_SC
->PCON = 0x8;
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/* Deep Sleep Mode*/
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__WFI();
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}
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/*********************************************************************/
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void
CLKPWR_PowerDown
(
void
)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB
->SCR = 0x4;
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LPC_SC
->PCON = 0x09;
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/* Power Down Mode*/
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__WFI();
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}
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/*********************************************************************/
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void
CLKPWR_DeepPowerDown
(
void
)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB
->SCR = 0x4;
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LPC_SC
->PCON = 0x03;
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/* Deep Power Down Mode*/
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__WFI();
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}
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/* --------------------------------- End Of File ------------------------------ */
arch
arm
lpc17xx
Drivers
source
lpc17xx_clkpwr.c
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