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Macros
CLKPWR Private Macros
CLKPWR

Macros

#define CLKPWR_CLKSRCSEL_CLKSRC_IRC   ((uint32_t)(0x00))
 
#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC   ((uint32_t)(0x01))
 
#define CLKPWR_CLKSRCSEL_CLKSRC_RTC   ((uint32_t)(0x02))
 
#define CLKPWR_CLKSRCSEL_BITMASK   ((uint32_t)(0x03))
 
#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU   ((uint32_t)(0x00))
 
#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC   ((uint32_t)(0x01))
 
#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC   ((uint32_t)(0x02))
 
#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB   ((uint32_t)(0x03))
 
#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC   ((uint32_t)(0x04))
 
#define CLKPWR_CLKOUTCFG_CLKOUTDIV(n)   ((uint32_t)((n&0x0F)<<4))
 
#define CLKPWR_CLKOUTCFG_CLKOUT_EN   ((uint32_t)(1<<8))
 
#define CLKPWR_CLKOUTCFG_CLKOUT_ACT   ((uint32_t)(1<<9))
 
#define CLKPWR_CLKOUTCFG_BITMASK   ((uint32_t)(0x3FF))
 
#define CLKPWR_PLL0CON_ENABLE   ((uint32_t)(0x01))
 
#define CLKPWR_PLL0CON_CONNECT   ((uint32_t)(0x02))
 
#define CLKPWR_PLL0CON_BITMASK   ((uint32_t)(0x03))
 
#define CLKPWR_PLL0CFG_MSEL(n)   ((uint32_t)(n&0x7FFF))
 
#define CLKPWR_PLL0CFG_NSEL(n)   ((uint32_t)((n<<16)&0xFF0000))
 
#define CLKPWR_PLL0CFG_BITMASK   ((uint32_t)(0xFF7FFF))
 
#define CLKPWR_PLL0STAT_MSEL(n)   ((uint32_t)(n&0x7FFF))
 
#define CLKPWR_PLL0STAT_NSEL(n)   ((uint32_t)((n>>16)&0xFF))
 
#define CLKPWR_PLL0STAT_PLLE   ((uint32_t)(1<<24))
 
#define CLKPWR_PLL0STAT_PLLC   ((uint32_t)(1<<25))
 
#define CLKPWR_PLL0STAT_PLOCK   ((uint32_t)(1<<26))
 
#define CLKPWR_PLL0FEED_BITMASK   ((uint32_t)0xFF)
 
#define CLKPWR_PLL1CON_ENABLE   ((uint32_t)(0x01))
 
#define CLKPWR_PLL1CON_CONNECT   ((uint32_t)(0x02))
 
#define CLKPWR_PLL1CON_BITMASK   ((uint32_t)(0x03))
 
#define CLKPWR_PLL1CFG_MSEL(n)   ((uint32_t)(n&0x1F))
 
#define CLKPWR_PLL1CFG_PSEL(n)   ((uint32_t)((n&0x03)<<5))
 
#define CLKPWR_PLL1CFG_BITMASK   ((uint32_t)(0x7F))
 
#define CLKPWR_PLL1STAT_MSEL(n)   ((uint32_t)(n&0x1F))
 
#define CLKPWR_PLL1STAT_PSEL(n)   ((uint32_t)((n>>5)&0x03))
 
#define CLKPWR_PLL1STAT_PLLE   ((uint32_t)(1<<8))
 
#define CLKPWR_PLL1STAT_PLLC   ((uint32_t)(1<<9))
 
#define CLKPWR_PLL1STAT_PLOCK   ((uint32_t)(1<<10))
 
#define CLKPWR_PLL1FEED_BITMASK   ((uint32_t)0xFF)
 
#define CLKPWR_CCLKCFG_BITMASK   ((uint32_t)(0xFF))
 
#define CLKPWR_USBCLKCFG_BITMASK   ((uint32_t)(0x0F))
 
#define CLKPWR_IRCTRIM_BITMASK   ((uint32_t)(0x0F))
 
#define CLKPWR_PCLKSEL0_BITMASK   ((uint32_t)(0xFFF3F3FF))
 
#define CLKPWR_PCLKSEL1_BITMASK   ((uint32_t)(0xFCF3F0F3))
 
#define CLKPWR_PCLKSEL_SET(p, n)   _SBF(p,n)
 
#define CLKPWR_PCLKSEL_BITMASK(p)   _SBF(p,0x03)
 
#define CLKPWR_PCLKSEL_GET(p, n)   ((uint32_t)((n>>p)&0x03))
 
#define CLKPWR_PCON_PM0   ((uint32_t)(1<<0))
 
#define CLKPWR_PCON_PM1   ((uint32_t)(1<<1))
 
#define CLKPWR_PCON_BODPDM   ((uint32_t)(1<<2))
 
#define CLKPWR_PCON_BOGD   ((uint32_t)(1<<3))
 
#define CLKPWR_PCON_BORD   ((uint32_t)(1<<4))
 
#define CLKPWR_PCON_SMFLAG   ((uint32_t)(1<<8))
 
#define CLKPWR_PCON_DSFLAG   ((uint32_t)(1<<9))
 
#define CLKPWR_PCON_PDFLAG   ((uint32_t)(1<<10))
 
#define CLKPWR_PCON_DPDFLAG   ((uint32_t)(1<<11))
 
#define CLKPWR_PCONP_BITMASK   0xEFEFF7DE
 

Detailed Description

Macro Definition Documentation

#define CLKPWR_CCLKCFG_BITMASK   ((uint32_t)(0xFF))

Macro defines for CPU Clock Configuration RegisterCPU Clock configuration bit mask

Definition at line 302 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_BITMASK   ((uint32_t)(0x3FF))

Clock source selection bit mask

Definition at line 215 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_ACT   ((uint32_t)(1<<9))

CLKOUT activity indication

Definition at line 213 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_EN   ((uint32_t)(1<<8))

CLKOUT enable control

Definition at line 211 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTDIV (   n)    ((uint32_t)((n&0x0F)<<4))

Integer value to divide the output clock by, minus one

Definition at line 209 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU   ((uint32_t)(0x00))

Macro defines for Clock Output Configuration RegisterSelects the CPU clock as the CLKOUT source

Definition at line 199 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC   ((uint32_t)(0x01))

Selects the main oscillator as the CLKOUT source

Definition at line 201 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC   ((uint32_t)(0x02))

Selects the Internal RC oscillator as the CLKOUT source

Definition at line 203 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC   ((uint32_t)(0x04))

Selects the RTC oscillator as the CLKOUT source

Definition at line 207 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB   ((uint32_t)(0x03))

Selects the USB clock as the CLKOUT source

Definition at line 205 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_BITMASK   ((uint32_t)(0x03))

Clock source selection bit mask

Definition at line 192 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_IRC   ((uint32_t)(0x00))

Macro defines for Clock Source Select RegisterInternal RC oscillator

Definition at line 186 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC   ((uint32_t)(0x01))

Main oscillator

Definition at line 188 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_RTC   ((uint32_t)(0x02))

RTC oscillator

Definition at line 190 of file lpc17xx_clkpwr.h.

#define CLKPWR_IRCTRIM_BITMASK   ((uint32_t)(0x0F))

Macro defines for IRC Trim RegisterIRC Trim bit mask

Definition at line 314 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL0_BITMASK   ((uint32_t)(0xFFF3F3FF))

Macro defines for Peripheral Clock Selection Register 0 and 1Peripheral Clock Selection 0 mask bit

Definition at line 320 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL1_BITMASK   ((uint32_t)(0xFCF3F0F3))

Peripheral Clock Selection 1 mask bit

Definition at line 322 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_BITMASK (   p)    _SBF(p,0x03)

Macro to mask peripheral clock of each type

Definition at line 328 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_GET (   p,
  n 
)    ((uint32_t)((n>>p)&0x03))

Macro to get peripheral clock of each type

Definition at line 330 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SET (   p,
  n 
)    _SBF(p,n)

Macro to set peripheral clock of each type p: position of two bits that hold divider of peripheral clock n: value of divider of peripheral clock to be set

Definition at line 326 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BODPDM   ((uint32_t)(1<<2))

Brown-Out Reduced Power Mode

Definition at line 340 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BOGD   ((uint32_t)(1<<3))

Brown-Out Global Disable

Definition at line 342 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BORD   ((uint32_t)(1<<4))

Brown Out Reset Disable

Definition at line 344 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DPDFLAG   ((uint32_t)(1<<11))

Deep Power-down entry flag

Definition at line 352 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DSFLAG   ((uint32_t)(1<<9))

Deep Sleep entry flag

Definition at line 348 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PDFLAG   ((uint32_t)(1<<10))

Power-down entry flag

Definition at line 350 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM0   ((uint32_t)(1<<0))

Macro defines for Power Mode Control RegisterPower mode control bit 0

Definition at line 336 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM1   ((uint32_t)(1<<1))

Power mode control bit 1

Definition at line 338 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_SMFLAG   ((uint32_t)(1<<8))

Sleep Mode entry flag

Definition at line 346 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_BITMASK   0xEFEFF7DE

Macro defines for Power Control for Peripheral RegisterPower Control for Peripherals bit mask

Definition at line 358 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_BITMASK   ((uint32_t)(0xFF7FFF))

PLL 0 Configuration bit mask

Definition at line 235 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_MSEL (   n)    ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Configuration RegisterPLL 0 Configuration MSEL field

Definition at line 231 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_NSEL (   n)    ((uint32_t)((n<<16)&0xFF0000))

PLL 0 Configuration NSEL field

Definition at line 233 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_BITMASK   ((uint32_t)(0x03))

PLL 0 control bit mask

Definition at line 225 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_CONNECT   ((uint32_t)(0x02))

PLL 0 control connect

Definition at line 223 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_ENABLE   ((uint32_t)(0x01))

Macro defines for PPL0 Control RegisterPLL 0 control enable

Definition at line 221 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0FEED_BITMASK   ((uint32_t)0xFF)

Macro defines for PPL0 Feed RegisterPLL0 Feed bit mask

Definition at line 256 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_MSEL (   n)    ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Status RegisterPLL 0 MSEL value

Definition at line 242 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_NSEL (   n)    ((uint32_t)((n>>16)&0xFF))

PLL NSEL get value

Definition at line 244 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLC   ((uint32_t)(1<<25))

PLL status Connect bit

Definition at line 248 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLE   ((uint32_t)(1<<24))

PLL status enable bit

Definition at line 246 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLOCK   ((uint32_t)(1<<26))

PLL status lock

Definition at line 250 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_BITMASK   ((uint32_t)(0x7F))

USB PLL configuration bit mask

Definition at line 276 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_MSEL (   n)    ((uint32_t)(n&0x1F))

Macro defines for PLL1 Configuration RegisterUSB PLL MSEL set value

Definition at line 272 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_PSEL (   n)    ((uint32_t)((n&0x03)<<5))

USB PLL PSEL set value

Definition at line 274 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_BITMASK   ((uint32_t)(0x03))

USB PLL control bit mask

Definition at line 266 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_CONNECT   ((uint32_t)(0x02))

USB PLL control connect

Definition at line 264 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_ENABLE   ((uint32_t)(0x01))

Macro defines for PLL1 Control RegisterUSB PLL control enable

Definition at line 262 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1FEED_BITMASK   ((uint32_t)0xFF)

Macro defines for PLL1 Feed RegisterPLL1 Feed bit mask

Definition at line 296 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_MSEL (   n)    ((uint32_t)(n&0x1F))

Macro defines for PLL1 Status RegisterUSB PLL MSEL get value

Definition at line 282 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLC   ((uint32_t)(1<<9))

USB PLL status Connect bit

Definition at line 288 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLE   ((uint32_t)(1<<8))

USB PLL status enable bit

Definition at line 286 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLOCK   ((uint32_t)(1<<10))

USB PLL status lock

Definition at line 290 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PSEL (   n)    ((uint32_t)((n>>5)&0x03))

USB PLL PSEL get value

Definition at line 284 of file lpc17xx_clkpwr.h.

#define CLKPWR_USBCLKCFG_BITMASK   ((uint32_t)(0x0F))

Macro defines for USB Clock Configuration RegisterUSB Clock Configuration bit mask

Definition at line 308 of file lpc17xx_clkpwr.h.