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Macros
SPI Private Macros
SPI

Macros

#define SPI_SPCR_BIT_EN   ((uint32_t)(1<<2))
 
#define SPI_SPCR_CPHA_SECOND   ((uint32_t)(1<<3))
 
#define SPI_SPCR_CPOL_LOW   ((uint32_t)(1<<4))
 
#define SPI_SPCR_MSTR   ((uint32_t)(1<<5))
 
#define SPI_SPCR_LSBF   ((uint32_t)(1<<6))
 
#define SPI_SPCR_SPIE   ((uint32_t)(1<<7))
 
#define SPI_SPCR_BITS(n)   ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
 
#define SPI_SPCR_BITMASK   ((uint32_t)(0xFFC))
 
#define SPI_SPSR_ABRT   ((uint32_t)(1<<3))
 
#define SPI_SPSR_MODF   ((uint32_t)(1<<4))
 
#define SPI_SPSR_ROVR   ((uint32_t)(1<<5))
 
#define SPI_SPSR_WCOL   ((uint32_t)(1<<6))
 
#define SPI_SPSR_SPIF   ((uint32_t)(1<<7))
 
#define SPI_SPSR_BITMASK   ((uint32_t)(0xF8))
 
#define SPI_SPDR_LO_MASK   ((uint32_t)(0xFF))
 
#define SPI_SPDR_HI_MASK   ((uint32_t)(0xFF00))
 
#define SPI_SPDR_BITMASK   ((uint32_t)(0xFFFF))
 
#define SPI_SPCCR_COUNTER(n)   ((uint32_t)(n&0xFF))
 
#define SPI_SPCCR_BITMASK   ((uint32_t)(0xFF))
 
#define SPI_SPTCR_TEST_MASK   ((uint32_t)(0xFE))
 
#define SPI_SPTCR_BITMASK   ((uint32_t)(0xFE))
 
#define SPI_SPTSR_ABRT   ((uint32_t)(1<<3))
 
#define SPI_SPTSR_MODF   ((uint32_t)(1<<4))
 
#define SPI_SPTSR_ROVR   ((uint32_t)(1<<5))
 
#define SPI_SPTSR_WCOL   ((uint32_t)(1<<6))
 
#define SPI_SPTSR_SPIF   ((uint32_t)(1<<7))
 
#define SPI_SPTSR_MASKBIT   ((uint32_t)(0xF8))
 
#define SPI_SPINT_INTFLAG   ((uint32_t)(1<<0))
 
#define SPI_SPINT_BITMASK   ((uint32_t)(0x01))
 
#define PARAM_SPIx(n)   (((uint32_t *)n)==((uint32_t *)LPC_SPI))
 
#define PARAM_SPI_CPHA(n)   ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
 
#define PARAM_SPI_CPOL(n)   ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
 
#define PARAM_SPI_MODE(n)   ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
 
#define PARAM_SPI_DATA_ORDER(n)   ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
 
#define PARAM_SPI_DATABIT(n)
 
#define PARAM_SPI_STAT(n)
 

Detailed Description

Macro Definition Documentation

#define PARAM_SPI_CPHA (   n)    ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))

Macro check Clock phase control mode

Definition at line 198 of file lpc17xx_spi.h.

#define PARAM_SPI_CPOL (   n)    ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))

Macro check Clock polarity control mode

Definition at line 201 of file lpc17xx_spi.h.

#define PARAM_SPI_DATA_ORDER (   n)    ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))

Macro check LSB/MSB mode

Definition at line 207 of file lpc17xx_spi.h.

#define PARAM_SPI_DATABIT (   n)
Value:
((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \
|| (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \
|| (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \
|| (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \
|| (n==SPI_DATABIT_15))

Macro check databit value

Definition at line 210 of file lpc17xx_spi.h.

#define PARAM_SPI_MODE (   n)    ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))

Macro check master/slave mode

Definition at line 204 of file lpc17xx_spi.h.

#define PARAM_SPI_STAT (   n)
Value:
((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \
|| (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \
|| (n==SPI_STAT_SPIF))

Macro check status flag

Definition at line 217 of file lpc17xx_spi.h.

#define PARAM_SPIx (   n)    (((uint32_t *)n)==((uint32_t *)LPC_SPI))

Macro to determine if it is valid SPI port number

Definition at line 195 of file lpc17xx_spi.h.

#define SPI_SPCCR_BITMASK   ((uint32_t)(0xFF))

SPI clock counter bit-mask

Definition at line 158 of file lpc17xx_spi.h.

#define SPI_SPCCR_COUNTER (   n)    ((uint32_t)(n&0xFF))

Macro defines for SPI Clock Counter RegisterSPI clock counter setting

Definition at line 156 of file lpc17xx_spi.h.

#define SPI_SPCR_BIT_EN   ((uint32_t)(1<<2))

Macro defines for SPI Control Register Bit enable, the SPI controller sends and receives the number of bits selected by bits 11:8

Definition at line 109 of file lpc17xx_spi.h.

#define SPI_SPCR_BITMASK   ((uint32_t)(0xFFC))

SPI Control bit mask

Definition at line 124 of file lpc17xx_spi.h.

#define SPI_SPCR_BITS (   n)    ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) 
 When bit 2 of this register is 1, this field controls the

number of bits per transfer

Definition at line 122 of file lpc17xx_spi.h.

#define SPI_SPCR_CPHA_SECOND   ((uint32_t)(1<<3))

Clock phase control bit

Definition at line 111 of file lpc17xx_spi.h.

#define SPI_SPCR_CPOL_LOW   ((uint32_t)(1<<4))

Clock polarity control bit

Definition at line 113 of file lpc17xx_spi.h.

#define SPI_SPCR_LSBF   ((uint32_t)(1<<6))

LSB enable bit

Definition at line 117 of file lpc17xx_spi.h.

#define SPI_SPCR_MSTR   ((uint32_t)(1<<5))

SPI master mode enable

Definition at line 115 of file lpc17xx_spi.h.

#define SPI_SPCR_SPIE   ((uint32_t)(1<<7))

SPI interrupt enable bit

Definition at line 119 of file lpc17xx_spi.h.

#define SPI_SPDR_BITMASK   ((uint32_t)(0xFFFF))

SPI Data bit-mask

Definition at line 150 of file lpc17xx_spi.h.

#define SPI_SPDR_HI_MASK   ((uint32_t)(0xFF00))

SPI Data high bit-mask

Definition at line 148 of file lpc17xx_spi.h.

#define SPI_SPDR_LO_MASK   ((uint32_t)(0xFF))

Macro defines for SPI Data RegisterSPI Data low bit-mask

Definition at line 146 of file lpc17xx_spi.h.

#define SPI_SPINT_BITMASK   ((uint32_t)(0x01))

SPI interrupt register bit mask

Definition at line 190 of file lpc17xx_spi.h.

#define SPI_SPINT_INTFLAG   ((uint32_t)(1<<0))

Macro defines for SPI Interrupt RegisterSPI interrupt flag

Definition at line 188 of file lpc17xx_spi.h.

#define SPI_SPSR_ABRT   ((uint32_t)(1<<3))

Macro defines for SPI Status RegisterSlave abort

Definition at line 130 of file lpc17xx_spi.h.

#define SPI_SPSR_BITMASK   ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 140 of file lpc17xx_spi.h.

#define SPI_SPSR_MODF   ((uint32_t)(1<<4))

Mode fault

Definition at line 132 of file lpc17xx_spi.h.

#define SPI_SPSR_ROVR   ((uint32_t)(1<<5))

Read overrun

Definition at line 134 of file lpc17xx_spi.h.

#define SPI_SPSR_SPIF   ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 138 of file lpc17xx_spi.h.

#define SPI_SPSR_WCOL   ((uint32_t)(1<<6))

Write collision

Definition at line 136 of file lpc17xx_spi.h.

#define SPI_SPTCR_BITMASK   ((uint32_t)(0xFE))

SPI Test register bit mask

Definition at line 166 of file lpc17xx_spi.h.

#define SPI_SPTCR_TEST_MASK   ((uint32_t)(0xFE))

SPI Test bit

Definition at line 164 of file lpc17xx_spi.h.

#define SPI_SPTSR_ABRT   ((uint32_t)(1<<3))

Macro defines for SPI Test Status RegisterSlave abort

Definition at line 172 of file lpc17xx_spi.h.

#define SPI_SPTSR_MASKBIT   ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 182 of file lpc17xx_spi.h.

#define SPI_SPTSR_MODF   ((uint32_t)(1<<4))

Mode fault

Definition at line 174 of file lpc17xx_spi.h.

#define SPI_SPTSR_ROVR   ((uint32_t)(1<<5))

Read overrun

Definition at line 176 of file lpc17xx_spi.h.

#define SPI_SPTSR_SPIF   ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 180 of file lpc17xx_spi.h.

#define SPI_SPTSR_WCOL   ((uint32_t)(1<<6))

Write collision

Definition at line 178 of file lpc17xx_spi.h.