uc-sdk
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#define GPDMA_DMACConfig_BITMASK ((0x03)) |
Definition at line 184 of file lpc17xx_gpdma.h.
#define GPDMA_DMACConfig_E ((0x01)) |
Macro defines for DMA Configuration registerDMA Controller enable
Definition at line 182 of file lpc17xx_gpdma.h.
#define GPDMA_DMACConfig_M ((0x02)) |
AHB Master endianness configuration
Definition at line 183 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_A ((1UL<<17)) |
Active
Definition at line 231 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF)) |
DMA Channel Configuration registers bit mask
Definition at line 234 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_DestPeripheral | ( | n) | (((n&0x1F)<<6)) |
Destination peripheral
Definition at line 226 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_E ((1UL<<0)) |
Macro defines for DMA Channel Configuration registersDMA control enable
Definition at line 224 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_H ((1UL<<18)) |
Halt
Definition at line 232 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_IE ((1UL<<14)) |
Interrupt error mask
Definition at line 228 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_ITC ((1UL<<15)) |
Terminal count interrupt mask
Definition at line 229 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_L ((1UL<<16)) |
Lock
Definition at line 230 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_SrcPeripheral | ( | n) | (((n&0x1F)<<1)) |
Source peripheral
Definition at line 225 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_TransferType | ( | n) | (((n&0x7)<<11)) |
This value indicates the type of transfer
Definition at line 227 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF)) |
DMA channel control registers bit mask
Definition at line 219 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DBSize | ( | n) | (((n&0x07)<<15)) |
Destination burst size
Definition at line 209 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DI ((1UL<<27)) |
Destination increment
Definition at line 213 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DWidth | ( | n) | (((n&0x07)<<21)) |
Destination transfer width
Definition at line 211 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_I ((1UL<<31)) |
Terminal count interrupt enable bit
Definition at line 217 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot1 ((1UL<<28)) |
Indicates that the access is in user mode or privileged mode
Definition at line 214 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot2 ((1UL<<29)) |
Indicates that the access is bufferable or not bufferable
Definition at line 215 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot3 ((1UL<<30)) |
Indicates that the access is cacheable or not cacheable
Definition at line 216 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SBSize | ( | n) | (((n&0x07)<<12)) |
Source burst size
Definition at line 208 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SI ((1UL<<26)) |
Source increment
Definition at line 212 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SWidth | ( | n) | (((n&0x07)<<18)) |
Source transfer width
Definition at line 210 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_TransferSize | ( | n) | (((n&0xFFF)<<0)) |
Macro defines for DMA channel control registersTransfer size
Definition at line 207 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC)) |
Macro defines for DMA Channel Linked List Item registersDMA Channel Linked List Item registers bit mask
Definition at line 202 of file lpc17xx_gpdma.h.
#define GPDMA_DMACEnbldChns_BITMASK ((0xFF)) |
Definition at line 153 of file lpc17xx_gpdma.h.
#define GPDMA_DMACEnbldChns_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Enabled Channel register
Definition at line 152 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrClr_BITMASK ((0xFF)) |
Definition at line 135 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrClr_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Interrupt Error Clear register
Definition at line 134 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrStat_BITMASK ((0xFF)) |
Definition at line 129 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrStat_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Interrupt Error Status register
Definition at line 128 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntStat_BITMASK ((0xFF)) |
Definition at line 111 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntStat_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Interrupt Status register
Definition at line 110 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCClear_BITMASK ((0xFF)) |
Definition at line 123 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCClear_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Interrupt Terminal Count Request Clear register
Definition at line 122 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCStat_BITMASK ((0xFF)) |
Definition at line 117 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCStat_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Interrupt Terminal Count Request Status register
Definition at line 116 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF)) |
Definition at line 147 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntErrStat_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Raw Error Interrupt Status register
Definition at line 146 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF)) |
Definition at line 141 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntTCStat_Ch | ( | n) | (((1UL<<n)&0xFF)) |
Macro defines for DMA Raw Interrupt Terminal Count Status register
Definition at line 140 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF)) |
Definition at line 159 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftBReq_Src | ( | n) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Burst Request register
Definition at line 158 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF)) |
Definition at line 171 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLBReq_Src | ( | n) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Last Burst Request register
Definition at line 170 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF)) |
Definition at line 177 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLSReq_Src | ( | n) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Last Single Request register
Definition at line 176 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF)) |
Definition at line 165 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftSReq_Src | ( | n) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Single Request register
Definition at line 164 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSync_BITMASK ((0xFFFF)) |
Definition at line 190 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSync_Src | ( | n) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Synchronization register
Definition at line 189 of file lpc17xx_gpdma.h.
#define GPDMA_DMAReqSel_BITMASK ((0xFF)) |
Definition at line 196 of file lpc17xx_gpdma.h.
#define GPDMA_DMAReqSel_Input | ( | n) | (((1UL<<(n-8))&0xFF)) |
Macro defines for DMA Request Select register
Definition at line 195 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_BSIZE | ( | n) |
Definition at line 255 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_CHANNEL | ( | n) | ((n>=0) && (n<=7)) |
Definition at line 238 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_CONN | ( | n) |
Definition at line 241 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_REQSEL | ( | n) | ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER)) |
Definition at line 277 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_STAT | ( | n) |
Definition at line 265 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_STATCLR | ( | n) | ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR)) |
Definition at line 274 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_TRANSFERTYPE | ( | n) |
Definition at line 270 of file lpc17xx_gpdma.h.
#define PARAM_GPDMA_WIDTH | ( | n) |
Definition at line 261 of file lpc17xx_gpdma.h.