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27 #ifndef LPC17XX_GPDMA_H_
28 #define LPC17XX_GPDMA_H_
46 #define GPDMA_CONN_SSP0_Tx ((0UL))
47 #define GPDMA_CONN_SSP0_Rx ((1UL))
48 #define GPDMA_CONN_SSP1_Tx ((2UL))
49 #define GPDMA_CONN_SSP1_Rx ((3UL))
50 #define GPDMA_CONN_ADC ((4UL))
51 #define GPDMA_CONN_I2S_Channel_0 ((5UL))
52 #define GPDMA_CONN_I2S_Channel_1 ((6UL))
53 #define GPDMA_CONN_DAC ((7UL))
54 #define GPDMA_CONN_UART0_Tx ((8UL))
55 #define GPDMA_CONN_UART0_Rx ((9UL))
56 #define GPDMA_CONN_UART1_Tx ((10UL))
57 #define GPDMA_CONN_UART1_Rx ((11UL))
58 #define GPDMA_CONN_UART2_Tx ((12UL))
59 #define GPDMA_CONN_UART2_Rx ((13UL))
60 #define GPDMA_CONN_UART3_Tx ((14UL))
61 #define GPDMA_CONN_UART3_Rx ((15UL))
62 #define GPDMA_CONN_MAT0_0 ((16UL))
63 #define GPDMA_CONN_MAT0_1 ((17UL))
64 #define GPDMA_CONN_MAT1_0 ((18UL))
65 #define GPDMA_CONN_MAT1_1 ((19UL))
66 #define GPDMA_CONN_MAT2_0 ((20UL))
67 #define GPDMA_CONN_MAT2_1 ((21UL))
68 #define GPDMA_CONN_MAT3_0 ((22UL))
69 #define GPDMA_CONN_MAT3_1 ((23UL))
72 #define GPDMA_TRANSFERTYPE_M2M ((0UL))
73 #define GPDMA_TRANSFERTYPE_M2P ((1UL))
74 #define GPDMA_TRANSFERTYPE_P2M ((2UL))
75 #define GPDMA_TRANSFERTYPE_P2P ((3UL))
78 #define GPDMA_BSIZE_1 ((0UL))
79 #define GPDMA_BSIZE_4 ((1UL))
80 #define GPDMA_BSIZE_8 ((2UL))
81 #define GPDMA_BSIZE_16 ((3UL))
82 #define GPDMA_BSIZE_32 ((4UL))
83 #define GPDMA_BSIZE_64 ((5UL))
84 #define GPDMA_BSIZE_128 ((6UL))
85 #define GPDMA_BSIZE_256 ((7UL))
88 #define GPDMA_WIDTH_BYTE ((0UL))
89 #define GPDMA_WIDTH_HALFWORD ((1UL))
90 #define GPDMA_WIDTH_WORD ((2UL))
93 #define GPDMA_REQSEL_UART ((0UL))
94 #define GPDMA_REQSEL_TIMER ((1UL))
110 #define GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
111 #define GPDMA_DMACIntStat_BITMASK ((0xFF))
116 #define GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
117 #define GPDMA_DMACIntTCStat_BITMASK ((0xFF))
122 #define GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
123 #define GPDMA_DMACIntTCClear_BITMASK ((0xFF))
128 #define GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
129 #define GPDMA_DMACIntErrStat_BITMASK ((0xFF))
134 #define GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
135 #define GPDMA_DMACIntErrClr_BITMASK ((0xFF))
140 #define GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
141 #define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
146 #define GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
147 #define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
152 #define GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
153 #define GPDMA_DMACEnbldChns_BITMASK ((0xFF))
158 #define GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
159 #define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
164 #define GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
165 #define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
170 #define GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
171 #define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
176 #define GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
177 #define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
182 #define GPDMA_DMACConfig_E ((0x01))
183 #define GPDMA_DMACConfig_M ((0x02))
184 #define GPDMA_DMACConfig_BITMASK ((0x03))
189 #define GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
190 #define GPDMA_DMACSync_BITMASK ((0xFFFF))
195 #define GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF))
196 #define GPDMA_DMAReqSel_BITMASK ((0xFF))
202 #define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
207 #define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
208 #define GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12))
209 #define GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15))
210 #define GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18))
211 #define GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21))
212 #define GPDMA_DMACCxControl_SI ((1UL<<26))
213 #define GPDMA_DMACCxControl_DI ((1UL<<27))
214 #define GPDMA_DMACCxControl_Prot1 ((1UL<<28))
215 #define GPDMA_DMACCxControl_Prot2 ((1UL<<29))
216 #define GPDMA_DMACCxControl_Prot3 ((1UL<<30))
217 #define GPDMA_DMACCxControl_I ((1UL<<31))
219 #define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
224 #define GPDMA_DMACCxConfig_E ((1UL<<0))
225 #define GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1))
226 #define GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6))
227 #define GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11))
228 #define GPDMA_DMACCxConfig_IE ((1UL<<14))
229 #define GPDMA_DMACCxConfig_ITC ((1UL<<15))
230 #define GPDMA_DMACCxConfig_L ((1UL<<16))
231 #define GPDMA_DMACCxConfig_A ((1UL<<17))
232 #define GPDMA_DMACCxConfig_H ((1UL<<18))
234 #define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
238 #define PARAM_GPDMA_CHANNEL(n) ((n>=0) && (n<=7))
241 #define PARAM_GPDMA_CONN(n) ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
242 || (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
243 || (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \
244 || (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \
245 || (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
246 || (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
247 || (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
248 || (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
249 || (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
250 || (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
251 || (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
252 || (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))
255 #define PARAM_GPDMA_BSIZE(n) ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
256 || (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
257 || (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
258 || (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))
261 #define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
262 || (n==GPDMA_WIDTH_WORD))
265 #define PARAM_GPDMA_STAT(n) ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
266 || (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
267 || (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))
270 #define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \
271 ||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P))
274 #define PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
277 #define PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))