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lpc17xx_clkpwr.h
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1 /***********************************************************************/
21 /* Peripheral group ----------------------------------------------------------- */
27 #ifndef LPC17XX_CLKPWR_H_
28 #define LPC17XX_CLKPWR_H_
29 
30 /* Includes ------------------------------------------------------------------- */
31 #include "LPC17xx.h"
32 #include "lpc_types.h"
33 
34 #ifdef __cplusplus
35 extern "C"
36 {
37 #endif
38 
39 /* Public Macros -------------------------------------------------------------- */
44 /**********************************************************************
45  * Peripheral Clock Selection Definitions
46  **********************************************************************/
48 #define CLKPWR_PCLKSEL_WDT ((uint32_t)(0))
49 
50 #define CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))
51 
52 #define CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))
53 
54 #define CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))
55 
56 #define CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))
57 
58 #define CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))
59 
60 #define CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))
61 
62 #define CLKPWR_PCLKSEL_SPI ((uint32_t)(16))
63 
64 #define CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))
65 
66 #define CLKPWR_PCLKSEL_DAC ((uint32_t)(22))
67 
68 #define CLKPWR_PCLKSEL_ADC ((uint32_t)(24))
69 
70 #define CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))
71 
72 #define CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))
73 
74 #define CLKPWR_PCLKSEL_ACF ((uint32_t)(30))
75 
76 #define CLKPWR_PCLKSEL_QEI ((uint32_t)(32))
77 
78 #define CLKPWR_PCLKSEL_PCB ((uint32_t)(36))
79 
80 #define CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))
81 
82 #define CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))
83 
84 #define CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))
85 
86 #define CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))
87 
88 #define CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))
89 
90 #define CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))
91 
92 #define CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))
93 
94 #define CLKPWR_PCLKSEL_I2S ((uint32_t)(54))
95 
96 #define CLKPWR_PCLKSEL_RIT ((uint32_t)(58))
97 
98 #define CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))
99 
100 #define CLKPWR_PCLKSEL_MC ((uint32_t)(62))
101 
106 /* Peripheral clock divider is set to 4 from CCLK */
107 #define CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))
108 
109 #define CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))
110 
111 #define CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))
112 
113 
114 /********************************************************************
115 * Power Control for Peripherals Definitions
116 **********************************************************************/
118 #define CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))
119 /* Timer/Counter 1 power/clock control bit */
120 #define CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))
121 
122 #define CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))
123 
124 #define CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))
125 
126 #define CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))
127 
128 #define CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))
129 
130 #define CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))
131 
132 #define CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))
133 
134 #define CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))
135 
136 #define CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))
137 
138 #define CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))
139 
140 #define CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))
141 
142 #define CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))
143 
144 #define CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))
145 
146 #define CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))
147 
148 #define CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))
149 
150 #define CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))
151 
152 #define CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))
153 
154 #define CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))
155 
156 #define CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))
157 
158 #define CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))
159 
160 #define CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))
161 
162 #define CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))
163 
164 #define CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))
165 
166 #define CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))
167 
168 #define CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))
169 
170 #define CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))
171 
172 
176 /* Private Macros ------------------------------------------------------------- */
181 /* --------------------- BIT DEFINITIONS -------------------------------------- */
182 /*********************************************************************/
186 #define CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))
187 
188 #define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))
189 
190 #define CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))
191 
192 #define CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))
193 
194 /*********************************************************************/
197 /* Clock Output Configuration register definition */
199 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))
200 
201 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))
202 
203 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))
204 
205 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))
206 
207 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))
208 
209 #define CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4))
210 
211 #define CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))
212 
213 #define CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))
214 
215 #define CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))
216 
217 /*********************************************************************/
221 #define CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))
222 
223 #define CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))
224 
225 #define CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))
226 
227 /*********************************************************************/
231 #define CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF))
232 
233 #define CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000))
234 
235 #define CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))
236 
237 
238 /*********************************************************************/
242 #define CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF))
243 
244 #define CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF))
245 
246 #define CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))
247 
248 #define CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))
249 
250 #define CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))
251 
252 /*********************************************************************/
256 #define CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)
257 
258 /*********************************************************************/
262 #define CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))
263 
264 #define CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))
265 
266 #define CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))
267 
268 /*********************************************************************/
272 #define CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F))
273 
274 #define CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5))
275 
276 #define CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))
277 
278 /*********************************************************************/
282 #define CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F))
283 
284 #define CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03))
285 
286 #define CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))
287 
288 #define CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))
289 
290 #define CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))
291 
292 /*********************************************************************/
296 #define CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)
297 
298 /*********************************************************************/
302 #define CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))
303 
304 /*********************************************************************/
308 #define CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))
309 
310 /*********************************************************************/
314 #define CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))
315 
316 /*********************************************************************/
320 #define CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))
321 
322 #define CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))
323 
326 #define CLKPWR_PCLKSEL_SET(p,n) _SBF(p,n)
327 
328 #define CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03)
329 
330 #define CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03))
331 
332 /*********************************************************************/
336 #define CLKPWR_PCON_PM0 ((uint32_t)(1<<0))
337 
338 #define CLKPWR_PCON_PM1 ((uint32_t)(1<<1))
339 
340 #define CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))
341 
342 #define CLKPWR_PCON_BOGD ((uint32_t)(1<<3))
343 
344 #define CLKPWR_PCON_BORD ((uint32_t)(1<<4))
345 
346 #define CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))
347 
348 #define CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))
349 
350 #define CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))
351 
352 #define CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))
353 
354 /*********************************************************************/
358 #define CLKPWR_PCONP_BITMASK 0xEFEFF7DE
359 
365 /* Public Functions ----------------------------------------------------------- */
370 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal);
371 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType);
372 uint32_t CLKPWR_GetPCLK (uint32_t ClkType);
373 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState);
374 void CLKPWR_Sleep(void);
375 void CLKPWR_DeepSleep(void);
376 void CLKPWR_PowerDown(void);
377 void CLKPWR_DeepPowerDown(void);
378 
384 #ifdef __cplusplus
385 }
386 #endif
387 
388 #endif /* LPC17XX_CLKPWR_H_ */
389 
394 /* --------------------------------- End Of File ------------------------------ */