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lpc17xx_pwm.c
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1 /***********************************************************************/
20 /* Peripheral group ----------------------------------------------------------- */
25 /* Includes ------------------------------------------------------------------- */
26 #include "lpc17xx_pwm.h"
27 #include "lpc17xx_clkpwr.h"
28 
29 /* If this source file built with example, the LPC17xx FW library configuration
30  * file in each example directory ("lpc17xx_libcfg.h") must be included,
31  * otherwise the default FW library configuration file must be included instead
32  */
33 #ifdef __BUILD_WITH_EXAMPLE__
34 #include "lpc17xx_libcfg.h"
35 #else
36 #include "lpc17xx_libcfg_default.h"
37 #endif /* __BUILD_WITH_EXAMPLE__ */
38 
39 
40 #ifdef _PWM
41 
42 
43 /* Public Functions ----------------------------------------------------------- */
49 /*********************************************************************/
64 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
65 {
66  CHECK_PARAM(PARAM_PWMx(PWMx));
68 
69  return ((PWMx->IR & IntFlag) ? SET : RESET);
70 }
71 
72 
73 
74 /*********************************************************************/
89 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
90 {
91  CHECK_PARAM(PARAM_PWMx(PWMx));
93  PWMx->IR = IntFlag;
94 }
95 
96 
97 
98 /*****************************************************************************/
115 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
116 {
117  PWM_TIMERCFG_Type *pTimeCfg;
118  PWM_COUNTERCFG_Type *pCounterCfg;
119  CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
120 
121  pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct;
122  pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct;
123 
124  if (PWMTimerCounterMode == PWM_MODE_TIMER )
125  {
127  pTimeCfg->PrescaleValue = 1;
128  }
129  else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
130  {
131  pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0;
132  pCounterCfg->CounterOption = PWM_COUNTER_RISING;
133  }
134 }
135 
136 
137 /*********************************************************************/
150 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
151 {
152  PWM_TIMERCFG_Type *pTimeCfg;
153  PWM_COUNTERCFG_Type *pCounterCfg;
154  uint64_t clkdlycnt;
155 
156  CHECK_PARAM(PARAM_PWMx(PWMx));
157  CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
158 
159  pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct;
160  pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct;
161 
162 
165  // Get peripheral clock of PWM1
166  clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1);
167 
168 
169  // Clear all interrupts pending
170  PWMx->IR = 0xFF & PWM_IR_BITMASK;
171  PWMx->TCR = 0x00;
172  PWMx->CTCR = 0x00;
173  PWMx->MCR = 0x00;
174  PWMx->CCR = 0x00;
175  PWMx->PCR = 0x00;
176  PWMx->LER = 0x00;
177 
178  if (PWMTimerCounterMode == PWM_MODE_TIMER)
179  {
181 
182  /* Absolute prescale value */
184  {
185  PWMx->PR = pTimeCfg->PrescaleValue - 1;
186  }
187  /* uSecond prescale value */
188  else
189  {
190  clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000;
191  PWMx->PR = ((uint32_t) clkdlycnt) - 1;
192  }
193 
194  }
195  else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
196  {
199 
200  PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \
201  | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect));
202  }
203 }
204 
205 /*********************************************************************/
211 void PWM_DeInit (LPC_PWM_TypeDef *PWMx)
212 {
213  CHECK_PARAM(PARAM_PWMx(PWMx));
214 
215  // Disable PWM control (timer, counter and PWM)
216  PWMx->TCR = 0x00;
218 
219 }
220 
221 
222 /*********************************************************************/
230 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
231 {
232  CHECK_PARAM(PARAM_PWMx(PWMx));
234 
235  if (NewState == ENABLE)
236  {
237  PWMx->TCR |= PWM_TCR_PWM_ENABLE;
238  }
239  else
240  {
241  PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK;
242  }
243 }
244 
245 
246 /*********************************************************************/
254 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
255 {
256  CHECK_PARAM(PARAM_PWMx(PWMx));
258  if (NewState == ENABLE)
259  {
260  PWMx->TCR |= PWM_TCR_COUNTER_ENABLE;
261  }
262  else
263  {
265  }
266 }
267 
268 
269 /*********************************************************************/
275 {
276  CHECK_PARAM(PARAM_PWMx(PWMx));
277  PWMx->TCR |= PWM_TCR_COUNTER_RESET;
279 }
280 
281 
282 /*********************************************************************/
290 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
291 {
292  CHECK_PARAM(PARAM_PWMx(PWMx));
293  CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel));
294  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch));
295  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch));
296  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch));
297 
298  //interrupt on MRn
299  if (PWM_MatchConfigStruct->IntOnMatch == ENABLE)
300  {
301  PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
302  }
303  else
304  {
305  PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
306  & PWM_MCR_BITMASK;
307  }
308 
309  //reset on MRn
310  if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE)
311  {
312  PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
313  }
314  else
315  {
316  PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
317  & PWM_MCR_BITMASK;
318  }
319 
320  //stop on MRn
321  if (PWM_MatchConfigStruct->StopOnMatch == ENABLE)
322  {
323  PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
324  }
325  else
326  {
327  PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
328  & PWM_MCR_BITMASK;
329  }
330 }
331 
332 
333 /*********************************************************************/
341 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
342 {
343  CHECK_PARAM(PARAM_PWMx(PWMx));
344  CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel));
345  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge));
346  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption));
347  CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge));
348 
349  if (PWM_CaptureConfigStruct->RisingEdge == ENABLE)
350  {
351  PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel);
352  }
353  else
354  {
355  PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \
356  & PWM_CCR_BITMASK;
357  }
358 
359  if (PWM_CaptureConfigStruct->FallingEdge == ENABLE)
360  {
361  PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel);
362  }
363  else
364  {
365  PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \
366  & PWM_CCR_BITMASK;
367  }
368 
369  if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE)
370  {
371  PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel);
372  }
373  else
374  {
375  PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \
376  & PWM_CCR_BITMASK;
377  }
378 }
379 
380 
381 /*********************************************************************/
388 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
389 {
390  CHECK_PARAM(PARAM_PWMx(PWMx));
391  CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel));
392 
393  switch (CaptureChannel)
394  {
395  case 0:
396  return PWMx->CR0;
397 
398  case 1:
399  return PWMx->CR1;
400 
401  default:
402  return (0);
403  }
404 }
405 
406 
407 /********************************************************************/
419 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
420  uint32_t MatchValue, uint8_t UpdateType)
421 {
422  CHECK_PARAM(PARAM_PWMx(PWMx));
423  CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel));
424  CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
425 
426  switch (MatchChannel)
427  {
428  case 0:
429  PWMx->MR0 = MatchValue;
430  break;
431 
432  case 1:
433  PWMx->MR1 = MatchValue;
434  break;
435 
436  case 2:
437  PWMx->MR2 = MatchValue;
438  break;
439 
440  case 3:
441  PWMx->MR3 = MatchValue;
442  break;
443 
444  case 4:
445  PWMx->MR4 = MatchValue;
446  break;
447 
448  case 5:
449  PWMx->MR5 = MatchValue;
450  break;
451 
452  case 6:
453  PWMx->MR6 = MatchValue;
454  break;
455  }
456 
457  // Write Latch register
458  PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel);
459 
460  // In case of update now
461  if (UpdateType == PWM_MATCH_UPDATE_NOW)
462  {
463  PWMx->TCR |= PWM_TCR_COUNTER_RESET;
465  }
466 }
467 
468 
469 /********************************************************************/
479 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
480 {
481  CHECK_PARAM(PARAM_PWMx(PWMx));
483  CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption));
484 
485  // Single edge mode
486  if (ModeOption == PWM_CHANNEL_SINGLE_EDGE)
487  {
488  PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK;
489  }
490  // Double edge mode
491  else if (PWM_CHANNEL_DUAL_EDGE)
492  {
493  PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel);
494  }
495 }
496 
497 
498 
499 /********************************************************************/
508 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
509 {
510  CHECK_PARAM(PARAM_PWMx(PWMx));
511  CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel));
512 
513  if (NewState == ENABLE)
514  {
515  PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel);
516  }
517  else
518  {
519  PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK;
520  }
521 }
522 
527 #endif /* _PWM */
528 
533 /* --------------------------------- End Of File ------------------------------ */