lpc17xx_adc.c

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/***********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/* Includes ------------------------------------------------------------------- */
#include "lpc17xx_adc.h"
#include "lpc17xx_clkpwr.h"

/* If this source file built with example, the LPC17xx FW library configuration
 * file in each example directory ("lpc17xx_libcfg.h") must be included,
 * otherwise the default FW library configuration file must be included instead
 */
#ifdef __BUILD_WITH_EXAMPLE__
#include "lpc17xx_libcfg.h"
#else
#include "lpc17xx_libcfg_default.h"
#endif /* __BUILD_WITH_EXAMPLE__ */


#ifdef _ADC

/* Public Functions ----------------------------------------------------------- */
/*********************************************************************/
void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate)
{
    uint32_t temp, tmp;

    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_RATE(rate));

    // Turn on power and clock
    CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);

    ADCx->ADCR = 0;

    //Enable PDN bit
    tmp = ADC_CR_PDN;
    // Set clock frequency
    temp = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC);
    /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
     * A/D converter, which should be less than or equal to 13MHz.
     * A fully conversion requires 65 of these clocks.
     * ADC clock = PCLK_ADC0 / (CLKDIV + 1);
     * ADC rate = ADC clock / 65;
     */
    temp = (temp /(rate * 65)) - 1;
    tmp |=  ADC_CR_CLKDIV(temp);

    ADCx->ADCR = tmp;
}


/*********************************************************************/
void ADC_DeInit(LPC_ADC_TypeDef *ADCx)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));

    // Clear PDN bit
    ADCx->ADCR &= ~ADC_CR_PDN;
    // Turn on power and clock
    CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, DISABLE);
}


/*********************************************************************/
uint32_t ADC_GetData(uint32_t channel)
{
    uint32_t adc_value;

    CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));

    adc_value = *(uint32_t *)((&LPC_ADC->ADDR0) + channel);
    return ADC_GDR_RESULT(adc_value);
}

/*********************************************************************/
void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_START_OPT(start_mode));

    ADCx->ADCR &= ~ADC_CR_START_MASK;
    ADCx->ADCR |=ADC_CR_START_MODE_SEL((uint32_t)start_mode);
}


/*********************************************************************/
void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));

    ADCx->ADCR &= ~ADC_CR_BURST;
    if (NewState){
        ADCx->ADCR |= ADC_CR_BURST;
    }
}

/*********************************************************************/
void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));

    ADCx->ADCR &= ~ADC_CR_PDN;
    if (NewState){
        ADCx->ADCR |= ADC_CR_PDN;
    }
}

/*********************************************************************/
void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_START_ON_EDGE_OPT(EdgeOption));

    ADCx->ADCR &= ~ADC_CR_EDGE;
    if (EdgeOption){
        ADCx->ADCR |= ADC_CR_EDGE;
    }
}

/*********************************************************************/
void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_TYPE_INT_OPT(IntType));

    ADCx->ADINTEN &= ~ADC_INTEN_CH(IntType);
    if (NewState){
        ADCx->ADINTEN |= ADC_INTEN_CH(IntType);
    }
}

/*********************************************************************/
void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(Channel));

    if (NewState == ENABLE) {
        ADCx->ADCR |= ADC_CR_CH_SEL(Channel);
    } else {
        ADCx->ADCR &= ~ADC_CR_CH_SEL(Channel);
    }
}

/*********************************************************************/
uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel)
{
    uint32_t adc_value;

    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));

    adc_value = *(uint32_t *) ((&ADCx->ADDR0) + channel);
    return ADC_DR_RESULT(adc_value);
}

/*********************************************************************/
FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
{
    uint32_t temp;

    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
    CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));

    temp =  *(uint32_t *) ((&ADCx->ADDR0) + channel);
    if (StatusType) {
        temp &= ADC_DR_DONE_FLAG;
    }else{
        temp &= ADC_DR_OVERRUN_FLAG;
    }
    if (temp) {
        return SET;
    } else {
        return RESET;
    }

}

/*********************************************************************/
uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx)
{
    CHECK_PARAM(PARAM_ADCx(ADCx));

    return ((uint32_t)(ADCx->ADGDR));
}

/*********************************************************************/
FlagStatus  ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
{
    uint32_t temp;

    CHECK_PARAM(PARAM_ADCx(ADCx));
    CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));

    temp =  ADCx->ADGDR;
    if (StatusType){
        temp &= ADC_DR_DONE_FLAG;
    }else{
        temp &= ADC_DR_OVERRUN_FLAG;
    }
    if (temp){
        return SET;
    }else{
        return RESET;
    }
}

#endif /* _ADC */

/* --------------------------------- End Of File ------------------------------ */