Nugget
hwregs.h
1 /*
2 
3 MIT License
4 
5 Copyright (c) 2019 PCSX-Redux authors
6 
7 Permission is hereby granted, free of charge, to any person obtaining a copy
8 of this software and associated documentation files (the "Software"), to deal
9 in the Software without restriction, including without limitation the rights
10 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 copies of the Software, and to permit persons to whom the Software is
12 furnished to do so, subject to the following conditions:
13 
14 The above copyright notice and this permission notice shall be included in all
15 copies or substantial portions of the Software.
16 
17 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 SOFTWARE.
24 
25 */
26 
27 #pragma once
28 
29 #include <stdint.h>
30 
31 struct Counter {
32  uint16_t value;
33  uint16_t padding1;
34  uint16_t mode;
35  uint16_t padding2;
36  uint16_t target;
37  uint8_t padding[6];
38 };
39 
40 struct SIO {
41  uint8_t fifo;
42  uint8_t preview[3];
43  uint16_t stat;
44  uint16_t padding;
45  uint16_t mode;
46  uint16_t ctrl;
47  uint16_t reserved;
48  uint16_t baudRate;
49 };
50 
51 #define HW_U8(x) (*(volatile uint8_t *)(x))
52 #define HW_U16(x) (*(volatile uint16_t *)(x))
53 #define HW_U32(x) (*(volatile uint32_t *)(x))
54 #define HW_S8(x) (*(volatile int8_t *)(x))
55 #define HW_S16(x) (*(volatile int16_t *)(x))
56 #define HW_S32(x) (*(volatile int32_t *)(x))
57 
58 #define SBUS_DEV4_CTRL HW_U32(0x1f801014)
59 #define SBUS_DEV5_CTRL HW_U32(0x1f801018)
60 #define SBUS_COM_CTRL HW_U32(0x1f801020)
61 
62 #define SIOS ((volatile struct SIO *)0x1f801040)
63 
64 #define RAM_SIZE HW_U32(0x1f801060)
65 
66 #define IREG HW_U32(0xbf801070)
67 #define IMASK HW_U32(0xbf801074)
68 
69 #define DPCR HW_U32(0x1f8010f0)
70 #define DICR HW_U32(0x1f8010f4)
71 
72 #define COUNTERS ((volatile struct Counter *)0xbf801100)
73 
74 #define GPU_DATA HW_U32(0x1f801810)
75 #define GPU_STATUS HW_U32(0x1f801814)
76 
77 #define ATCONS_STAT HW_U8(0x1f802000)
78 #define ATCONS_FIFO HW_U8(0x1f802002)
79 #define ATCONS_IRQ HW_U8(0x1f802030)
80 #define ATCONS_IRQ2 HW_U8(0x1f802032)
81 
82 #define POST HW_U8(0xbf802041)
Definition: hwregs.h:31
Definition: hwregs.h:40