51 #define HW_U8(x) (*(volatile uint8_t *)(x))
52 #define HW_U16(x) (*(volatile uint16_t *)(x))
53 #define HW_U32(x) (*(volatile uint32_t *)(x))
54 #define HW_S8(x) (*(volatile int8_t *)(x))
55 #define HW_S16(x) (*(volatile int16_t *)(x))
56 #define HW_S32(x) (*(volatile int32_t *)(x))
58 #define SBUS_DEV4_CTRL HW_U32(0x1f801014)
59 #define SBUS_DEV5_CTRL HW_U32(0x1f801018)
60 #define SBUS_COM_CTRL HW_U32(0x1f801020)
62 #define SIOS ((volatile struct SIO *)0x1f801040)
64 #define RAM_SIZE HW_U32(0x1f801060)
66 #define IREG HW_U32(0xbf801070)
67 #define IMASK HW_U32(0xbf801074)
69 #define DPCR HW_U32(0x1f8010f0)
70 #define DICR HW_U32(0x1f8010f4)
72 #define COUNTERS ((volatile struct Counter *)0xbf801100)
74 #define GPU_DATA HW_U32(0x1f801810)
75 #define GPU_STATUS HW_U32(0x1f801814)
77 #define ATCONS_STAT HW_U8(0x1f802000)
78 #define ATCONS_FIFO HW_U8(0x1f802002)
79 #define ATCONS_IRQ HW_U8(0x1f802030)
80 #define ATCONS_IRQ2 HW_U8(0x1f802032)
82 #define POST HW_U8(0xbf802041)