arch_x86.h

// Copyright (c) Electronic Arts Inc. All rights reserved.
 
 
#ifndef EASTL_ATOMIC_INTERNAL_ARCH_X86_H
#define EASTL_ATOMIC_INTERNAL_ARCH_X86_H
 
#if defined(EA_PRAGMA_ONCE_SUPPORTED)
    #pragma once
#endif
 
 
 
#if (defined(__clang__) || defined(EA_COMPILER_GNUC)) && defined(EA_PROCESSOR_X86_64)
    #define EASTL_ARCH_ATOMIC_HAS_128BIT
#elif defined(EA_COMPILER_MSVC)
    #if EA_PLATFORM_PTR_SIZE == 8
        #define EASTL_ARCH_ATOMIC_HAS_128BIT
    #endif
#endif
 
 
 
#if defined(EA_COMPILER_MSVC) && defined(EA_PROCESSOR_X86)
 
 
    #define EASTL_ARCH_ATOMIC_X86_NOP_PRE_COMPUTE_DESIRED(ret, observed, val) \
        static_assert(false, "EASTL_ARCH_ATOMIC_X86_NOP_PRE_COMPUTE_DESIRED() must be implmented!");
 
    #define EASTL_ARCH_ATOMIC_X86_NOP_POST_COMPUTE_RET(ret, prevObserved, val)
 
 
    #define EASTL_ARCH_ATOMIC_X86_OP_64_IMPL(type, ret, ptr, val, MemoryOrder, PRE_COMPUTE_DESIRED, POST_COMPUTE_RET) \
        {                                                                   \
            bool cmpxchgRet;                                                \
            EASTL_ATOMIC_LOAD_RELAXED_64(type, ret, ptr);                   \
            do                                                              \
            {                                                               \
                type computedDesired;                                       \
                PRE_COMPUTE_DESIRED(computedDesired, ret, (val));           \
                EA_PREPROCESSOR_JOIN(EA_PREPROCESSOR_JOIN(EASTL_ATOMIC_CMPXCHG_STRONG_, MemoryOrder), _64)(type, cmpxchgRet, ptr, &(ret), computedDesired); \
            } while (!cmpxchgRet);                                          \
            POST_COMPUTE_RET(ret, ret, (val));                              \
        }
 
 
#endif
 
 
#if ((defined(__clang__) || defined(EA_COMPILER_GNUC)) && defined(EA_PROCESSOR_X86_64))
 
 
    #define EASTL_ARCH_ATOMIC_X86_NOP_PRE_COMPUTE_DESIRED(ret, observed, val) \
        static_assert(false, "EASTL_ARCH_ATOMIC_X86_NOP_PRE_COMPUTE_DESIRED() must be implmented!");
 
    #define EASTL_ARCH_ATOMIC_X86_NOP_POST_COMPUTE_RET(ret, prevObserved, val)
 
 
    #define EASTL_ARCH_ATOMIC_X86_OP_128_IMPL(type, ret, ptr, val, MemoryOrder, PRE_COMPUTE_DESIRED, POST_COMPUTE_RET) \
        {                                                                   \
            bool cmpxchgRet;                                                \
            /* This is intentionally a non-atomic 128-bit load which may observe shearing. */ \
            /* Either we do not observe *(ptr) but then the cmpxchg will fail and the observed */ \
            /* atomic load will be returned. Or the non-atomic load got lucky and the cmpxchg succeeds */ \
            /* because the observed value equals the value in *(ptr) thus we optimistically do a non-atomic load. */ \
            ret = *(ptr);                                                   \
            do                                                              \
            {                                                               \
                type computedDesired;                                       \
                PRE_COMPUTE_DESIRED(computedDesired, ret, (val));           \
                EA_PREPROCESSOR_JOIN(EA_PREPROCESSOR_JOIN(EASTL_ATOMIC_CMPXCHG_STRONG_, MemoryOrder), _128)(type, cmpxchgRet, ptr, &(ret), computedDesired); \
            } while (!cmpxchgRet);                                          \
            POST_COMPUTE_RET(ret, ret, (val));                              \
        }
 
 
#endif
 
 
 
 
#include "arch_x86_fetch_add.h"
#include "arch_x86_fetch_sub.h"
 
#include "arch_x86_fetch_and.h"
#include "arch_x86_fetch_xor.h"
#include "arch_x86_fetch_or.h"
 
#include "arch_x86_add_fetch.h"
#include "arch_x86_sub_fetch.h"
 
#include "arch_x86_and_fetch.h"
#include "arch_x86_xor_fetch.h"
#include "arch_x86_or_fetch.h"
 
#include "arch_x86_exchange.h"
 
#include "arch_x86_cmpxchg_weak.h"
#include "arch_x86_cmpxchg_strong.h"
 
#include "arch_x86_memory_barrier.h"
 
#include "arch_x86_thread_fence.h"
 
#include "arch_x86_load.h"
#include "arch_x86_store.h"
 
 
#endif /* EASTL_ATOMIC_INTERNAL_ARCH_X86_H */