Nugget
arch_load.h
1 // Copyright (c) Electronic Arts Inc. All rights reserved.
4 
5 
6 #ifndef EASTL_ATOMIC_INTERNAL_ARCH_LOAD_H
7 #define EASTL_ATOMIC_INTERNAL_ARCH_LOAD_H
8 
9 #if defined(EA_PRAGMA_ONCE_SUPPORTED)
10  #pragma once
11 #endif
12 
13 
15 //
16 // void EASTL_ARCH_ATOMIC_LOAD_*_N(type, type ret, type * ptr)
17 //
18 #if defined(EASTL_ARCH_ATOMIC_LOAD_RELAXED_8)
19  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_8_AVAILABLE 1
20 #else
21  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_8_AVAILABLE 0
22 #endif
23 
24 #if defined(EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_8)
25  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_8_AVAILABLE 1
26 #else
27  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_8_AVAILABLE 0
28 #endif
29 
30 #if defined(EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_8)
31  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_8_AVAILABLE 1
32 #else
33  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_8_AVAILABLE 0
34 #endif
35 
36 
37 #if defined(EASTL_ARCH_ATOMIC_LOAD_RELAXED_16)
38  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_16_AVAILABLE 1
39 #else
40  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_16_AVAILABLE 0
41 #endif
42 
43 #if defined(EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_16)
44  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_16_AVAILABLE 1
45 #else
46  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_16_AVAILABLE 0
47 #endif
48 
49 #if defined(EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_16)
50  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_16_AVAILABLE 1
51 #else
52  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_16_AVAILABLE 0
53 #endif
54 
55 
56 #if defined(EASTL_ARCH_ATOMIC_LOAD_RELAXED_32)
57  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_32_AVAILABLE 1
58 #else
59  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_32_AVAILABLE 0
60 #endif
61 
62 #if defined(EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_32)
63  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_32_AVAILABLE 1
64 #else
65  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_32_AVAILABLE 0
66 #endif
67 
68 #if defined(EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_32)
69  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_32_AVAILABLE 1
70 #else
71  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_32_AVAILABLE 0
72 #endif
73 
74 #if defined(EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_32)
75  #define EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_32_AVAILABLE 1
76 #else
77  #define EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_32_AVAILABLE 0
78 #endif
79 
80 
81 #if defined(EASTL_ARCH_ATOMIC_LOAD_RELAXED_64)
82  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_64_AVAILABLE 1
83 #else
84  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_64_AVAILABLE 0
85 #endif
86 
87 #if defined(EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_64)
88  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_64_AVAILABLE 1
89 #else
90  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_64_AVAILABLE 0
91 #endif
92 
93 #if defined(EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_64)
94  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_64_AVAILABLE 1
95 #else
96  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_64_AVAILABLE 0
97 #endif
98 
99 #if defined(EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_64)
100  #define EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_64_AVAILABLE 1
101 #else
102  #define EASTL_ARCH_ATOMIC_LOAD_READ_DEPENDS_64_AVAILABLE 0
103 #endif
104 
105 
106 #if defined(EASTL_ARCH_ATOMIC_LOAD_RELAXED_128)
107  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_128_AVAILABLE 1
108 #else
109  #define EASTL_ARCH_ATOMIC_LOAD_RELAXED_128_AVAILABLE 0
110 #endif
111 
112 #if defined(EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_128)
113  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_128_AVAILABLE 1
114 #else
115  #define EASTL_ARCH_ATOMIC_LOAD_ACQUIRE_128_AVAILABLE 0
116 #endif
117 
118 #if defined(EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_128)
119  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_128_AVAILABLE 1
120 #else
121  #define EASTL_ARCH_ATOMIC_LOAD_SEQ_CST_128_AVAILABLE 0
122 #endif
123 
124 
125 #endif /* EASTL_ATOMIC_INTERNAL_ARCH_LOAD_H */
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